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    Searched refs:OP_NOP (Results 1 - 25 of 57) sorted by null

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  /dalvik/vm/mterp/c/
OP_NOP.cpp 1 HANDLE_OPCODE(OP_NOP)
  /external/proguard/src/proguard/optimize/peephole/
NopRemover.java 77 if (simpleInstruction.opcode == InstructionConstants.OP_NOP &&
  /external/proguard/src/proguard/classfile/instruction/
InstructionConstants.java 30 public static final byte OP_NOP = 0;
InstructionFactory.java 51 case InstructionConstants.OP_NOP:
  /dalvik/vm/analysis/
Optimize.cpp 170 volatileOpc = OP_NOP;
240 quickOpc = OP_NOP; /* if essential-only, no "-quick" sub */
241 if (quickOpc != OP_NOP || volatileOpc != OP_NOP)
276 if (volatileOpc != OP_NOP)
672 * If "volatileOpc" is OP_NOP we don't check to see if it's a volatile
673 * field. If "quickOpc" is OP_NOP, and this is a non-volatile field,
694 if (volatileOpc != OP_NOP && dvmIsVolatileField(instField)) {
698 } else if (quickOpc != OP_NOP && instField->byteOffset < 65536) {
724 assert(volatileOpc != OP_NOP);
    [all...]
VfyBasicBlock.cpp 445 } else if (opcode == OP_NOP && isDataChunk(meth->insns[nextIdx])) {
Liveness.cpp 335 case OP_NOP:
DexVerify.cpp 821 case OP_NOP:
    [all...]
  /dalvik/vm/compiler/codegen/mips/
CodegenCommon.cpp 353 mir->next->dalvikInsn.opcode = OP_NOP;
390 mir->next->dalvikInsn.opcode = OP_NOP;
  /dalvik/vm/compiler/codegen/arm/
CodegenCommon.cpp 347 mir->next->dalvikInsn.opcode = OP_NOP;
427 mir->next->dalvikInsn.opcode = OP_NOP;
  /dalvik/libdex/
DexOpcodes.h 71 OP_NOP = 0x00,
337 H(OP_NOP), \
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/
nv50_ir_from_sm4.cpp 361 case SM4_OPCODE_CASE: return OP_NOP;
365 case SM4_OPCODE_DEFAULT: return OP_NOP;
378 case SM4_OPCODE_ENDSWITCH: return OP_NOP;
411 case SM4_OPCODE_NOP: return OP_NOP;
429 case SM4_OPCODE_SWITCH: return OP_NOP;
490 return OP_NOP;
    [all...]
nv50_ir_ssa.cpp 429 Instruction *nop = new_Instruction(func, OP_NOP, typeOfSize(lval->reg.size));
526 if (stmt->op == OP_NOP)
nv50_ir_build_util.cpp 337 Instruction *insn = mkOp(OP_NOP, TYPE_NONE, NULL);
nv50_ir.cpp 586 op = OP_NOP;
nv50_ir.h 42 OP_NOP = 0,
  /external/mesa3d/src/gallium/drivers/nv50/codegen/
nv50_ir_from_sm4.cpp 361 case SM4_OPCODE_CASE: return OP_NOP;
365 case SM4_OPCODE_DEFAULT: return OP_NOP;
378 case SM4_OPCODE_ENDSWITCH: return OP_NOP;
411 case SM4_OPCODE_NOP: return OP_NOP;
429 case SM4_OPCODE_SWITCH: return OP_NOP;
490 return OP_NOP;
    [all...]
nv50_ir_ssa.cpp 429 Instruction *nop = new_Instruction(func, OP_NOP, typeOfSize(lval->reg.size));
526 if (stmt->op == OP_NOP)
nv50_ir_build_util.cpp 337 Instruction *insn = mkOp(OP_NOP, TYPE_NONE, NULL);
nv50_ir.cpp 586 op = OP_NOP;
nv50_ir.h 42 OP_NOP = 0,
  /libcore/dalvik/src/main/java/dalvik/bytecode/
Opcodes.java 30 int OP_NOP = 0x0000;
  /dalvik/vm/compiler/codegen/x86/
Lower.cpp 494 case OP_NOP:
495 return op_nop();
979 int op_nop() { function
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/
nv50_ir_emit_nvc0.cpp     [all...]
  /external/mesa3d/src/gallium/drivers/nvc0/codegen/
nv50_ir_emit_nvc0.cpp     [all...]

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