/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAddressingModes.h | 27 enum ShiftOpc { 45 static inline const char *getShiftOpcStr(ShiftOpc Op) { 56 static inline unsigned getShiftOpcEncoding(ShiftOpc Op) { 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { 118 static inline ShiftOpc getSORegShOp(unsigned Op) { 119 return (ShiftOpc)(Op & 7); 407 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO, 419 static inline ShiftOpc getAM2ShiftOpc(unsigned AM2Opc) { 420 return (ShiftOpc)((AM2Opc >> 13) & 7);
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ARMMCCodeEmitter.cpp | 182 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const { 191 llvm_unreachable("Invalid ShiftOpc!"); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMSelectionDAGInfo.h | 23 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
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ARMISelDAGToDAG.cpp | 93 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 465 ARM_AM::ShiftOpc ShOpcVal, 483 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode()); 507 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode()); 620 ARM_AM::ShiftOpc ShOpcVal = 761 ARM_AM::ShiftOpc ShOpcVal = 827 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode()); [all...] |
ARMFastISel.cpp | 175 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy); [all...] |
ARMCodeEmitter.cpp | [all...] |
ARMBaseInstrInfo.cpp | 177 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 118 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType, 385 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg 395 ARM_AM::ShiftOpc ShiftTy; 405 ARM_AM::ShiftOpc ShiftTy; 412 ARM_AM::ShiftOpc ShiftTy; [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | 41 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, 348 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
ARMDisassembler.cpp | [all...] |