| /external/llvm/include/llvm/CodeGen/ |
| LiveIntervalUnion.h | 119 Query(LiveInterval *VReg, LiveIntervalUnion *LIU):
120 LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false),
135 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) {
136 assert(VReg && LIU && "Invalid arguments");
137 if (UserTag == UTag && VirtReg == VReg &&
144 VirtReg = VReg;
162 bool isSeenInterference(LiveInterval *VReg) const;
167 // Did collectInterferingVRegs encounter an unspillable vreg?
|
| MachineRegisterInfo.h | 27 /// registers, including vreg register classes, use/def chains for registers,
43 /// Each element in this list contains the register class of the vreg and the
487 void addLiveIn(unsigned Reg, unsigned vreg = 0) {
488 LiveIns.push_back(std::make_pair(Reg, vreg));
501 /// getLiveInPhysReg - If VReg is a live-in virtual register, return the
503 unsigned getLiveInPhysReg(unsigned VReg) const;
|
| /external/llvm/lib/CodeGen/ |
| LiveIntervalUnion.cpp | 149 LiveInterval *VReg = LiveUnionI.value();
150 if (VReg != RecentReg && !isSeenInterference(VReg)) {
151 RecentReg = VReg;
152 InterferingVRegs.push_back(VReg);
|
| MachineFunction.cpp | 426 unsigned VReg = MRI.getLiveInVirtReg(PReg);
427 if (VReg) {
428 assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!");
429 return VReg;
431 VReg = MRI.createVirtualRegister(RC);
432 MRI.addLiveIn(PReg, VReg);
433 return VReg;
[all...] |
| LiveRangeEdit.cpp | 34 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
37 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
39 LiveInterval &LI = LIS.getOrCreateInterval(VReg);
|
| TailDuplication.cpp | 231 unsigned VReg = SSAUpdateVRs[i];
232 SSAUpdate.Initialize(VReg);
236 MachineInstr *DefMI = MRI->getVRegDef(VReg);
240 SSAUpdate.AddAvailableValue(DefBB, VReg);
245 SSAUpdateVals.find(VReg);
253 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
[all...] |
| MachineRegisterInfo.cpp | 345 /// getLiveInPhysReg - If VReg is a live-in virtual register, return the
347 unsigned MachineRegisterInfo::getLiveInPhysReg(unsigned VReg) const {
349 if (I->second == VReg)
|
| RegAllocFast.cpp | 186 LiveRegMap::iterator assignVirtToPhysReg(unsigned VReg, unsigned PhysReg);
854 DEBUG(dbgs() << "Unable to allocate vreg used by DBG_VALUE");
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 98 // If the node is only used by a CopyToReg and the dest reg is a vreg, use
99 // the CopyToReg'd destination register instead of creating a new vreg.
216 // is a vreg in the same register class, use the CopyToReg'd destination
217 // register instead of creating a new vreg.
272 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());
275 if (!VReg) {
278 VReg = MRI->createVirtualRegister(RC);
281 TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
282 return VReg;
305 unsigned VReg = getVR(Op, VRBaseMap)
[all...] |
| InstrEmitter.h | 84 /// ConstrainForSubReg - Try to constrain VReg to a register class that
87 unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
|
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.cpp | 68 unsigned VReg = RegNo & 0x0FFFFFFF;
69 OS << VReg;
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1RegisterInfo.cpp | 561 unsigned VReg = 0;
653 // register. The offset is already handled in the vreg value.
657 VReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass);
662 emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg,
665 emitLoadConstPool(MBB, II, dl, VReg, 0, Offset);
669 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,
672 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true);
675 // register. The offset is already handled in the vreg value.
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 393 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
394 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
395 SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
505 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
506 MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
507 SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32);
556 unsigned VReg = MF.addLiveIn(VA.getLocReg(),
558 SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT());
627 unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass);
628 SDValue VArg = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64)
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 707 // VReg or and SReg. In order to get a more accurate
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 858 unsigned VReg =
860 RegInfo.addLiveIn(VA.getLocReg(), VReg);
861 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
863 unsigned VReg =
865 RegInfo.addLiveIn(VA.getLocReg(), VReg);
866 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 351 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
352 RegInfo.addLiveIn(VA.getLocReg(), VReg);
353 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 623 unsigned VReg = MRI.createVirtualRegister(RC);
624 MRI.addLiveIn(VA.getLocReg(), VReg);
625 ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, LocVT);
674 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I],
676 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 767 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC);
768 MF.getRegInfo().addLiveIn(PReg, VReg);
769 return VReg;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
