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  /external/libffi/src/pa/
ffi.c 109 FP 64-bit arguments are passed in fr5 and fr7.
202 case 3: fldw(stack - slot, fr7); break;
213 /* First 2 args go in fr5, fr7. */
215 case 3: fldd(stack - slot, fr7); break;
476 case 3: fstw(fr7, (void *)(stack - slot)); break;
489 case 3: fstd(fr7, (void *)(stack - slot)); break;
  /external/libffi/src/sh/
sysv.S 143 fmov.s @r15+,fr7
158 fmov.s @r15+,fr7
194 fmov.s @r15+,fr7
213 fmov.s @r15+,fr7
541 fmov.s fr7,@-r1
549 fmov.s fr7,@-r1
  /art/compiler/dex/quick/arm/
target_arm.cc 29 static int FpRegs[] = {fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
34 static int fp_temps[] = {fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
663 Clobber(fr7);
arm_lir.h 171 fr7 = 7 + ARM_FP_REG_OFFSET, enumerator in enum:art::ArmNativeRegisterPool
  /art/compiler/dex/quick/x86/
target_x86.cc 36 fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
42 fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
x86_lir.h 187 fr7 = 7 + X86_FP_REG_OFFSET, enumerator in enum:art::X86NativeRegisterPool
  /dalvik/vm/compiler/template/mips/
TEMPLATE_RESTORE_STATE.S 63 lw f7, fr7*4(a0) # restore f7
TEMPLATE_SAVE_STATE.S 75 sw f7, fr7*4(a0) # save f7
TEMPLATE_MEM_OP_DECODE.S 19 sw f7, fr7*-4(sp) # push f7
137 lw f7, fr7*-4(sp) # pop f7
  /external/chromium_org/third_party/openssl/openssl/crypto/
pariscid.pl 62 fcpy,dbl %fr0,%fr7
  /external/openssl/crypto/
pariscid.pl 62 fcpy,dbl %fr0,%fr7
  /dalvik/vm/compiler/codegen/arm/
ArmLIR.h 240 fr7 = 7 + FP_REG_OFFSET, enumerator in enum:NativeRegisterPool
    [all...]
  /dalvik/vm/compiler/template/out/
CompilerTemplateAsm-mips.S     [all...]
  /external/libffi/src/sh64/
sysv.S 188 fld.s r15, OFS_FLT, fr7
  /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
pa-risc2.s 102 fw .reg %fr7
874 FLDD -152(%r30),%fr7 ;offset 0xa74
977 ftemp4 .reg %fr7
    [all...]
pa-risc2W.s 94 fw .reg %fr7
814 FLDD -272(%r30),%fr7 ; q
964 ftemp4 .reg %fr7
    [all...]
  /external/openssl/crypto/bn/asm/
pa-risc2.s 102 fw .reg %fr7
874 FLDD -152(%r30),%fr7 ;offset 0xa74
977 ftemp4 .reg %fr7
    [all...]
pa-risc2W.s 94 fw .reg %fr7
814 FLDD -272(%r30),%fr7 ; q
964 ftemp4 .reg %fr7
    [all...]

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