/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 206 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 268 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); 271 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); 274 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); 299 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 366 assert(VA.getLocVT() == MVT::f64); 396 if (VA.getLocVT() == MVT::f32) 398 else if (VA.getLocVT() != MVT::i32) { 400 DAG.getValueType(VA.getLocVT())); 401 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg) [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 340 EVT RegVT = VA.getLocVT(); 383 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; 386 << EVT(VA.getLocVT()).getEVTString() 395 InVal = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, 442 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 499 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 502 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 505 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); [all...] |
/external/llvm/include/llvm/CodeGen/ |
CallingConvLower.h | 124 MVT getLocVT() const { return LocVT; }
|
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 531 // (and so has type VA.getLocVT()). Convert Value to VA.getValVT(), chaining 539 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, 542 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, 562 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); 564 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); 566 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); 597 EVT LocVT = VA.getLocVT(); 638 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) 753 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32 [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | 328 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 470 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 473 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 476 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 855 EVT RegVT = VA.getLocVT(); 881 ObjSize = VA.getLocVT().getStoreSizeInBits() >> 3; [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.cpp | 214 EVT VT = VA.getLocVT(); [all...] |
R600ISelLowering.cpp | [all...] |