/external/llvm/include/llvm/MC/ |
MCInstrAnalysis.h | 32 return Info->get(Inst.getOpcode()).isBranch(); 36 return Info->get(Inst.getOpcode()).isConditionalBranch(); 40 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); 44 return Info->get(Inst.getOpcode()).isIndirectBranch(); 48 return Info->get(Inst.getOpcode()).isCall(); 52 return Info->get(Inst.getOpcode()).isReturn(); 56 return Info->get(Inst.getOpcode()).isTerminator();
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/dalvik/dexgen/src/com/android/dexgen/dex/code/ |
FixedSizeInsn.java | 52 return getOpcode().getFormat().codeSize(); 58 getOpcode().getFormat().writeTo(out, this); 70 return getOpcode().getFormat().listingString(this, noteIndices);
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/dalvik/dx/src/com/android/dx/dex/code/ |
FixedSizeInsn.java | 53 return getOpcode().getFormat().codeSize(); 59 getOpcode().getFormat().writeTo(out, this); 71 return getOpcode().getFormat().listingString(this, noteIndices);
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
FixedSizeInsn.java | 53 return getOpcode().getFormat().codeSize(); 59 getOpcode().getFormat().writeTo(out, this); 71 return getOpcode().getFormat().listingString(this, noteIndices);
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/external/llvm/lib/MC/ |
MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
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/dalvik/dx/src/com/android/dx/ssa/ |
NormalSsaInsn.java | 133 public Rop getOpcode() { 134 return insn.getOpcode(); 148 if (insn.getOpcode().getOpcode() == RegOps.MARK_LOCAL) { 185 return insn.getOpcode().getOpcode() == RegOps.MOVE; 191 return insn.getOpcode().getOpcode() == RegOps.MOVE_EXCEPTION; 223 Rop opcode = getOpcode(); 232 switch (opcode.getOpcode()) { [all...] |
/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
NormalSsaInsn.java | 128 public Rop getOpcode() { 129 return insn.getOpcode(); 143 if (insn.getOpcode().getOpcode() == RegOps.MARK_LOCAL) { 180 return insn.getOpcode().getOpcode() == RegOps.MOVE; 186 return insn.getOpcode().getOpcode() == RegOps.MOVE_EXCEPTION; 218 Rop opcode = getOpcode(); 227 switch (opcode.getOpcode()) { [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCBranchSelector.cpp | 116 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) 118 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || 119 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && 158 if (I->getOpcode() == PPC::BCC) { 169 } else if (I->getOpcode() == PPC::BDNZ) { 171 } else if (I->getOpcode() == PPC::BDNZ8) { 173 } else if (I->getOpcode() == PPC::BDZ) { 175 } else if (I->getOpcode() == PPC::BDZ8) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonNewValueJump.cpp | 130 if (II->getOpcode() == TargetOpcode::KILL) 180 if (MII->getOpcode() == Hexagon::CALLv3) 194 if (MII->getOpcode() == TargetOpcode::KILL || 195 MII->getOpcode() == TargetOpcode::PHI || 196 MII->getOpcode() == TargetOpcode::COPY) 203 if (MII->getOpcode() == Hexagon::TFR_condset_rr || 204 MII->getOpcode() == Hexagon::TFR_condset_ii || 205 MII->getOpcode() == Hexagon::TFR_condset_ri || 206 MII->getOpcode() == Hexagon::TFR_condset_ir || 207 MII->getOpcode() == Hexagon::LDriw_pred | [all...] |
HexagonRegisterInfo.cpp | 146 TII.isValidOffset(MI.getOpcode(), (FrameSize+Offset)) && 154 if (!TII.isValidOffset(MI.getOpcode(), Offset)) { 163 if ( (MI.getOpcode() == Hexagon::LDriw) || 164 (MI.getOpcode() == Hexagon::LDrid) || 165 (MI.getOpcode() == Hexagon::LDrih) || 166 (MI.getOpcode() == Hexagon::LDriuh) || 167 (MI.getOpcode() == Hexagon::LDrib) || 168 (MI.getOpcode() == Hexagon::LDriub) || 169 (MI.getOpcode() == Hexagon::LDriw_f) || 170 (MI.getOpcode() == Hexagon::LDrid_f)) [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelDAGToDAG.cpp | 82 if (Addr.getOpcode() == ISD::TargetExternalSymbol || 83 Addr.getOpcode() == ISD::TargetGlobalAddress) 86 if (Addr.getOpcode() == ISD::ADD) { 101 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) { 106 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) { 118 if (Addr.getOpcode() == ISD::FrameIndex) return false; 119 if (Addr.getOpcode() == ISD::TargetExternalSymbol || 120 Addr.getOpcode() == ISD::TargetGlobalAddress) 123 if (Addr.getOpcode() == ISD::ADD) { 127 if (Addr.getOperand(0).getOpcode() == SPISD::Lo | [all...] |
/external/llvm/lib/Target/R600/ |
R600EmitClauseMarkers.cpp | 38 switch (MI->getOpcode()) { 51 TII->isCubeOp(MI->getOpcode()) || 52 TII->isReductionOp(MI->getOpcode())) 66 if (TII->isALUInstr(MI->getOpcode())) 68 if (TII->isVector(*MI) || TII->isCubeOp(MI->getOpcode())) 70 switch (MI->getOpcode()) { 84 switch (MI->getOpcode()) { 112 assert((TII->isALUInstr(MI->getOpcode()) || 113 MI->getOpcode() == AMDGPU::DOT_4) && "Can't assign Const"); 175 if (I->getOpcode() == AMDGPU::PRED_X) [all...] |
/external/llvm/include/llvm/IR/ |
Operator.h | 49 /// getOpcode - Return the opcode for this Instruction or ConstantExpr. 51 unsigned getOpcode() const { 53 return I->getOpcode(); 54 return cast<ConstantExpr>(this)->getOpcode(); 57 /// getOpcode - If V is an Instruction or ConstantExpr, return its 60 static unsigned getOpcode(const Value *V) { 62 return I->getOpcode(); 64 return CE->getOpcode(); 112 return I->getOpcode() == Instruction::Add || 113 I->getOpcode() == Instruction::Sub | [all...] |
Instruction.h | 82 /// getOpcode() returns a member of one of the enums like Instruction::Add. 83 unsigned getOpcode() const { return getValueID() - InstructionVal; } 85 const char *getOpcodeName() const { return getOpcodeName(getOpcode()); } 86 bool isTerminator() const { return isTerminator(getOpcode()); } 87 bool isBinaryOp() const { return isBinaryOp(getOpcode()); } 88 bool isShift() { return isShift(getOpcode()); } 89 bool isCast() const { return isCast(getOpcode()); } 109 return getOpcode() == Shl || getOpcode() == LShr; 114 return getOpcode() == AShr [all...] |
/dalvik/dx/src/com/android/dx/rop/code/ |
PlainInsn.java | 92 return new PlainInsn(getOpcode(), getPosition(), 115 Rop newRop = Rops.ropFor(getOpcode().getOpcode(), getResult(), 130 int opcode = getOpcode().getOpcode(); 152 return new PlainInsn(getOpcode(), getPosition(),
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ThrowingCstInsn.java | 84 return new ThrowingCstInsn(getOpcode(), getPosition(), 92 return new ThrowingCstInsn(getOpcode(), getPosition(), 103 return new ThrowingCstInsn(getOpcode(), getPosition(),
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ThrowingInsn.java | 99 return new ThrowingInsn(getOpcode(), getPosition(), 106 return new ThrowingInsn(getOpcode(), getPosition(), 116 return new ThrowingInsn(getOpcode(), getPosition(),
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/external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
PlainInsn.java | 92 return new PlainInsn(getOpcode(), getPosition(), 115 Rop newRop = Rops.ropFor(getOpcode().getOpcode(), getResult(), 130 int opcode = getOpcode().getOpcode(); 152 return new PlainInsn(getOpcode(), getPosition(),
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ThrowingCstInsn.java | 84 return new ThrowingCstInsn(getOpcode(), getPosition(), 92 return new ThrowingCstInsn(getOpcode(), getPosition(), 103 return new ThrowingCstInsn(getOpcode(), getPosition(),
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ThrowingInsn.java | 99 return new ThrowingInsn(getOpcode(), getPosition(), 106 return new ThrowingInsn(getOpcode(), getPosition(), 116 return new ThrowingInsn(getOpcode(), getPosition(),
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/dalvik/dexgen/src/com/android/dexgen/rop/code/ |
PlainInsn.java | 91 return new PlainInsn(getOpcode(), getPosition(), 118 newRop = Rops.ropFor(getOpcode().getOpcode(), 135 return new PlainInsn(getOpcode(), getPosition(),
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ThrowingCstInsn.java | 79 return new ThrowingCstInsn(getOpcode(), getPosition(), 87 return new ThrowingCstInsn(getOpcode(), getPosition(), 98 return new ThrowingCstInsn(getOpcode(), getPosition(),
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ThrowingInsn.java | 99 return new ThrowingInsn(getOpcode(), getPosition(), 106 return new ThrowingInsn(getOpcode(), getPosition(), 116 return new ThrowingInsn(getOpcode(), getPosition(),
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/dalvik/dx/src/com/android/dx/io/instructions/ |
ZeroRegisterDecodedInstruction.java | 41 getFormat(), getOpcode(), newIndex, getIndexType(),
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/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
ZeroRegisterDecodedInstruction.java | 41 getFormat(), getOpcode(), newIndex, getIndexType(),
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