| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/ |
| r600_shader.h | 30 unsigned gpr; member in struct:r600_shader_io
|
| eg_asm.c | 76 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
107 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
|
| r600_asm.h | 125 unsigned gpr; member in struct:r600_bytecode_output
|
| r600_asm.c | 299 if (output->gpr >= bc->ngpr)
300 bc->ngpr = output->gpr + 1;
313 if ((output->gpr + output->burst_count) == bc->cf_last->output.gpr &&
318 bc->cf_last->output.gpr = output->gpr;
323 } else if (output->gpr == (bc->cf_last->output.gpr + bc->cf_last->output.burst_count) &&
671 /* set up gpr use */
686 /* Another scalar operation has already used the GPR read port for the channel. *
897 int gpr[5], chan[5]; local
[all...] |
| r600_shader.c | 598 int gpr = 0, base_chan = 0; local
618 /* work out gpr and base_chan from index */
619 gpr = ij_index / 2;
631 alu.dst.sel = ctx->shader->input[input].gpr;
637 alu.src[0].sel = gpr;
662 alu.dst.sel = ctx->shader->input[input].gpr;
763 int gpr_front = ctx->shader->input[front].gpr;
764 int gpr_back = ctx->shader->input[back].gpr;
802 ctx->shader->input[i].gpr = ctx->file_offset[TGSI_FILE_INPUT] + d->Range.First;
806 ctx->face_gpr = ctx->shader->input[i].gpr;
1130 int gpr = ctx->file_offset[TGSI_FILE_INPUT] + local
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_shader.h | 30 unsigned gpr; member in struct:r600_shader_io
|
| eg_asm.c | 76 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
107 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
|
| r600_asm.h | 125 unsigned gpr; member in struct:r600_bytecode_output
|
| r600_asm.c | 299 if (output->gpr >= bc->ngpr)
300 bc->ngpr = output->gpr + 1;
313 if ((output->gpr + output->burst_count) == bc->cf_last->output.gpr &&
318 bc->cf_last->output.gpr = output->gpr;
323 } else if (output->gpr == (bc->cf_last->output.gpr + bc->cf_last->output.burst_count) &&
671 /* set up gpr use */
686 /* Another scalar operation has already used the GPR read port for the channel. *
897 int gpr[5], chan[5]; local
[all...] |
| r600_shader.c | 598 int gpr = 0, base_chan = 0; local
618 /* work out gpr and base_chan from index */
619 gpr = ij_index / 2;
631 alu.dst.sel = ctx->shader->input[input].gpr;
637 alu.src[0].sel = gpr;
662 alu.dst.sel = ctx->shader->input[input].gpr;
763 int gpr_front = ctx->shader->input[front].gpr;
764 int gpr_back = ctx->shader->input[back].gpr;
802 ctx->shader->input[i].gpr = ctx->file_offset[TGSI_FILE_INPUT] + d->Range.First;
806 ctx->face_gpr = ctx->shader->input[i].gpr;
1130 int gpr = ctx->file_offset[TGSI_FILE_INPUT] + local
[all...] |
| /external/libffi/src/sparc/ |
| ffi.c | 475 void *rvalue, unsigned long *gpr, unsigned long *scratch)
493 rvalue = (void *) gpr[0];
508 avalue[i] = (void *)gpr[argn++];
513 /* gpr is 8-byte aligned. */
517 scratch[0] = gpr[argn];
518 scratch[1] = gpr[argn+1];
527 avalue[i] = ((char *) &gpr[argn]) - arg_types[i]->size;
540 void *rvalue, unsigned long *gpr, double *fpr)
556 rvalue = (void *) gpr[0];
573 avalue[i] = (void *)gpr[argn++]
[all...] |
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-ppc64-linux.c | 246 # define DO(gpr) frame->uc.uc_mcontext.gp_regs[VKI_PT_R0+gpr] \
247 = tst->arch.vex.guest_GPR##gpr
358 # define DO(gpr) tst->arch.vex.guest_GPR##gpr \
359 = frame->uc.uc_mcontext.gp_regs[VKI_PT_R0+gpr]
|
| sigframe-ppc32-linux.c | 146 # define DO(gpr) mc->mc_gregs[VKI_PT_R0+gpr] = tst->arch.vex.guest_GPR##gpr
921 # define DO(gpr) tst->arch.vex.guest_GPR##gpr = mc->mc_gregs[VKI_PT_R0+gpr]
[all...] |
| /external/compiler-rt/lib/asan/ |
| asan_linux.cc | 74 *sp = ucontext->uc_mcontext.regs->gpr[PT_R1];
77 *bp = ucontext->uc_mcontext.regs->gpr[PT_R31];
|
| /external/linux-tools-perf/arch/powerpc/util/ |
| dwarf-regs.c | 24 {.name = STR(%gpr##num), .dwarfnum = num}
|
| /external/qemu/hw/ |
| android_mips.c | 142 env->active_tc.gpr[4] = PHYS_TO_VIRT(cmdline);/* a0 */
143 env->active_tc.gpr[5] = ram_size; /* a1 */
144 env->active_tc.gpr[6] = 0; /* a2 */
145 env->active_tc.gpr[7] = 0; /* a3 */
|
| smc91c111.c | 28 uint16_t gpr; member in struct:__anon27256
66 qemu_put_be16(f, s->gpr);
102 s->gpr = qemu_get_be16(f);
372 SET_LOW(gpr, value);
375 SET_HIGH(gpr, value);
556 return s->gpr & 0xff;
558 return s->gpr >> 8;
|
| pc.c | 520 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
575 *p++ = gpr[i];
576 *p++ = gpr[i] >> 8;
577 *p++ = gpr[i] >> 16;
578 *p++ = gpr[i] >> 24;
618 uint32_t gpr[8]; local
758 memset(gpr, 0, sizeof gpr);
759 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
767 generate_bootsect(option_rom, gpr, seg, 0)
[all...] |
| /external/libffi/src/x86/ |
| ffi64.c | 42 UINT64 gpr[MAX_GPR_REGS]; member in struct:register_args
374 reg_args->gpr[gprcount++] = (long) rvalue;
412 reg_args->gpr[gprcount] = 0;
413 memcpy (®_args->gpr[gprcount], a, size < 8 ? size : 8);
490 rvalue = (void *) reg_args->gpr[gprcount++];
544 avalue[i] = ®_args->gpr[gprcount];
560 memcpy (a, ®_args->gpr[gprcount++], 8);
|
| /external/qemu/target-mips/ |
| cpu.h | 141 target_ulong gpr[32]; member in struct:TCState
515 env->active_tc.gpr[29] = newsp;
516 env->active_tc.gpr[7] = 0;
517 env->active_tc.gpr[2] = 0;
|
| machine.c | 12 qemu_put_betls(f, &tc->gpr[i]);
159 qemu_get_betls(f, &tc->gpr[i]);
|
| /external/libffi/src/powerpc/ |
| ppc_closure.S | 47 # so first save gpr 3 to gpr 10 (aligned to 4)
76 # now load up the pointer to the saved gpr registers
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/objfmts/elf/tests/ |
| elfmanysym.asm | 3 gpr: label
|
| /external/valgrind/main/coregrind/ |
| vgdb.c | 922 sp = user_mod.regs.gpr[1];
924 sp = user_mod.regs.gpr[1];
988 user_mod.regs.gpr[3] = check;
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_mips_defs.h | 552 HReg gpr; member in struct:__anon29116::__anon29117::__anon29135
685 extern MIPSInstr *MIPSInstr_RdWrLR(Bool wrLR, HReg gpr);
|
