/external/grub/netboot/ |
tiara.c | 109 static unsigned short ioaddr; variable 118 outb(CARD_DISABLE, ioaddr + DLCR_ENABLE); 119 outb(CLEAR_STATUS, ioaddr + DLCR_XMIT_STAT); 120 outb(NO_TX_IRQS, ioaddr + DLCR_XMIT_MASK); 121 outb(CLR_RCV_STATUS, ioaddr + DLCR_RECV_STAT); 122 outb(XMIT_MODE, ioaddr + DLCR_XMIT_MODE); 123 outb(RECV_MODE, ioaddr + DLCR_RECV_MODE); 125 while ((inb(ioaddr + DLCR_RECV_MODE) & BUF_EMPTY) == 0) 126 inb(ioaddr + BMPR_MEM_PORT); 129 outb(nic->node_addr[i], ioaddr + DLCR_NODE_ID + i) [all...] |
lance.c | 138 static unsigned short ioaddr; variable 218 (void)inw(ioaddr+LANCE_RESET); 221 outw(0, ioaddr+LANCE_RESET); 226 outw(0x2, ioaddr+LANCE_ADDR); 228 outw(inw(ioaddr+LANCE_BUS_IF) | 0x2, ioaddr+LANCE_BUS_IF); 237 outw(49, ioaddr+0x12) ; 238 media = inw(ioaddr+0x16) ; 249 outw(49, ioaddr+0x12) ; 250 outw(media, ioaddr+0x16) [all...] |
eepro.c | 261 #define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(40); 264 #define eepro_sel_reset(ioaddr) { \ 265 outb(SEL_RESET_CMD, ioaddr); \ 271 #define eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG) 274 #define eepro_en_rx(ioaddr) outb(RCV_ENABLE_CMD, ioaddr) 277 #define eepro_dis_rx(ioaddr) outb(RCV_DISABLE_CMD, ioaddr) 288 static unsigned short ioaddr = 0; variable [all...] |
natsemi.c | 195 static unsigned long ioaddr; 243 * leaves the ioaddress of the natsemi chip in the variable ioaddr. 261 ioaddr = *io_addrs & ~3; 281 prev_eedata = eeprom_read(ioaddr, 6); 283 int eedata = eeprom_read(ioaddr, i + 7); 289 printf("\nnatsemi_probe: MAC addr %! at ioaddr %#hX\n", 290 nic->node_addr, ioaddr); 294 outl(ChipReset, ioaddr + ChipCmd); 298 u32 chip_config = inl(ioaddr + ChipConfig); 307 nic_name, (int)inl(ioaddr + 0x84), advertising) 194 static unsigned long ioaddr; variable [all...] |
tulip.c | 381 static u32 ioaddr; 482 static int read_eeprom(unsigned long ioaddr, int location, int addr_len); 577 long mdio_addr = ioaddr + CSR9; 585 outl(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0); 586 inl(ioaddr + 0xA0); 587 inl(ioaddr + 0xA0); 589 if ( ! ((retval = inl(ioaddr + 0xA0)) & 0x80000000)) 597 return inl(ioaddr + 0xB4 + (location<<2)); 599 return inl(ioaddr + 0xD0); 601 return inl(ioaddr + 0xD4 + ((location-29)<<2)) 380 static u32 ioaddr; variable [all...] |
otulip.c | 32 static unsigned short ioaddr; variable 162 outl(0x00000001, ioaddr + CSR0); 165 outl(0x01A08000, ioaddr + CSR0); 173 outl(0x32404000, ioaddr + CSR6); 175 outl(0x32000040, ioaddr + CSR6); 186 outl(0x0, ioaddr + CSR13); /* reset SIA */ 187 outl(0x7f3f, ioaddr + CSR14); 188 outl(0x8000008, ioaddr + CSR15); 189 outl(0x0, ioaddr + CSR13); 190 outl(0x1, ioaddr + CSR13) [all...] |
eepro100.c | 106 static int ioaddr; variable 282 ioaddr + SCBCtrlMDI); 286 val = inl(ioaddr + SCBCtrlMDI); 302 outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI); 306 val = inl(ioaddr + SCBCtrlMDI); 324 long ee_addr = ioaddr + SCBeeprom; 361 outl(0, ioaddr + SCBPort); 385 status = inw(ioaddr + SCBStatus); 387 outw(status & 0xfc00, ioaddr + SCBStatus); 391 t, s, status, inw (ioaddr + SCBCmd)) [all...] |
via-rhine.c | 51 /* define all ioaddr */ 53 #define byPAR0 ioaddr 54 #define byRCR ioaddr + 6 55 #define byTCR ioaddr + 7 56 #define byCR0 ioaddr + 8 57 #define byCR1 ioaddr + 9 58 #define byISR0 ioaddr + 0x0c 59 #define byISR1 ioaddr + 0x0d 60 #define byIMR0 ioaddr + 0x0e 61 #define byIMR1 ioaddr + 0x0 639 unsigned short ioaddr; member in struct:rhine_private 981 int ioaddr = tp->ioaddr; local 997 int ioaddr = tp->ioaddr; local 1135 int ioaddr = tp->ioaddr; local [all...] |
ni5010.c | 53 #define EDLC_XSTAT (ioaddr + 0x00) /* EDLC transmit csr */ 54 #define EDLC_XCLR (ioaddr + 0x00) /* EDLC transmit "Clear IRQ" */ 55 #define EDLC_XMASK (ioaddr + 0x01) /* EDLC transmit "IRQ Masks" */ 56 #define EDLC_RSTAT (ioaddr + 0x02) /* EDLC receive csr */ 57 #define EDLC_RCLR (ioaddr + 0x02) /* EDLC receive "Clear IRQ" */ 58 #define EDLC_RMASK (ioaddr + 0x03) /* EDLC receive "IRQ Masks" */ 59 #define EDLC_XMODE (ioaddr + 0x04) /* EDLC transmit Mode */ 60 #define EDLC_RMODE (ioaddr + 0x05) /* EDLC receive Mode */ 61 #define EDLC_RESET (ioaddr + 0x06) /* EDLC RESET register */ 62 #define EDLC_TDR1 (ioaddr + 0x07) /* "Time Domain Reflectometry" reg1 * 169 static unsigned short ioaddr = 0; variable [all...] |
davicom.c | 134 static unsigned long ioaddr; 165 static int read_eeprom(unsigned long ioaddr, int location, int addr_len); 233 io_dcr9 = ioaddr + CSR9; 277 io_dcr9 = ioaddr + CSR9; 372 outl(csr6, ioaddr + CSR6); 391 outl(csr6, ioaddr + CSR6); 407 static int read_eeprom(unsigned long ioaddr, int location, int addr_len) 411 long ee_addr = ioaddr + CSR9; 503 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6) 133 static unsigned long ioaddr; variable [all...] |
rtl8139.c | 158 static int ioaddr; variable 195 ioaddr = probeaddrs[0] & ~3; 200 outb(0x00, ioaddr + Config1); 209 *ap++ = inb(ioaddr + MAC0 + i); 212 speed10 = inb(ioaddr + MediaStatus) & MSRSpeed10; 213 fullduplex = inw(ioaddr + MII_BMCR) & BMCRDuplex; 214 printf("ioaddr %#hX, addr %! %sMbps %s-duplex\n", ioaddr, 255 long ee_addr = ioaddr + Cfg9346; 289 outb(CmdReset, ioaddr + ChipCmd) [all...] |
smc9000.c | 55 * Function: smc_reset( int ioaddr ) 70 static void smc_reset(int ioaddr) 74 SMC_SELECT_BANK(ioaddr, 0); 75 _outw( RCR_SOFTRESET, ioaddr + RCR ); 78 SMC_DELAY(ioaddr); 82 _outw(RCR_CLEAR, ioaddr + RCR); 83 _outw(TCR_CLEAR, ioaddr + TCR); 86 SMC_SELECT_BANK(ioaddr, 2); 87 _outw( MC_RESET, ioaddr + MMU_CMD ); 92 _outb(0, ioaddr + INT_MASK) [all...] |
fa311.c | 101 unsigned int ioaddr; member in struct:FA311_DEV 112 static int eeprom_read(long ioaddr, int location); 139 dev->ioaddr = pci->membase; 142 prev_eedata = eeprom_read(dev->ioaddr, 6); 144 int eedata = eeprom_read(dev->ioaddr, i + 7); 169 writel(virt_to_bus(dev->rx_ring), dev->ioaddr + RxRingPtr); 170 writel(virt_to_bus(dev->tx_ring), dev->ioaddr + TxRingPtr); 174 writel(i, dev->ioaddr + RxFilterAddr); 176 dev->ioaddr + RxFilterData); 181 if (readl(dev->ioaddr + ChipConfig) & 0x20000000 [all...] |
sis900.c | 54 static unsigned long ioaddr; 216 * leaves the ioaddress of the sis900 chip in the variable ioaddr. 234 ioaddr = *io_addrs & ~3; 259 printf("\nsis900_probe: MAC addr %! at ioaddr %#hX\n", 260 nic->node_addr, ioaddr); 347 long ee_addr = ioaddr + mear; 417 long mdio_addr = ioaddr + mear; 446 long mdio_addr = ioaddr + mear; 510 outl(RxENA, ioaddr + cr); 531 outl(0, ioaddr + ier) 53 static unsigned long ioaddr; variable [all...] |
epic100.c | 61 static int ioaddr; variable 121 ioaddr = probeaddrs[0] & ~3; /* Mask the bit that says "this is an io addr" */ 124 command = ioaddr + COMMAND; /* Control Register */ 125 intstat = ioaddr + INTSTAT; /* Interrupt Status */ 126 intmask = ioaddr + INTMASK; /* Interrupt Mask */ 127 genctl = ioaddr + GENCTL; /* General Control */ 128 eectl = ioaddr + EECTL; /* EEPROM Control */ 129 test = ioaddr + TEST; /* Test register (clocks) */ 130 mmctl = ioaddr + MMCTL; /* MII Management Interface Control */ 131 mmdata = ioaddr + MMDATA; /* MII Management Interface Data * [all...] |
w89c840.c | 261 static int ioaddr; variable 272 static int eeprom_read(long ioaddr, int location); 323 writel(0x00000001, ioaddr + PCIBusCfg); 327 writel(virt_to_bus(w840private.rx_ring), ioaddr + RxRingPtr); 328 writel(virt_to_bus(w840private.tx_ring), ioaddr + TxRingPtr); 331 writeb(nic->node_addr[i], ioaddr + StationAddr + i); 345 writel(0xE010, ioaddr + PCIBusCfg); 347 writel(0, ioaddr + RxStartDemand); 353 writel(0x1A0F5, ioaddr + IntrStatus); 354 writel(0x1A0F5, ioaddr + IntrEnable) [all...] |
3c90x.c | 245 unsigned int IOAddr; 256 a3c90x_internal_IssueCommand(int ioaddr, int cmd, int param) 266 outw(val, ioaddr + regCommandIntStatus_w); 269 while (inw(ioaddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); 278 a3c90x_internal_SetWindow(int ioaddr, int window) 285 a3c90x_internal_IssueCommand(ioaddr, cmdSelectRegisterWindow, window); 295 a3c90x_internal_ReadEeprom(int ioaddr, int address) 300 a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winEepromBios0); 303 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); 306 outw(address + ((0x02)<<6), ioaddr + regEepromCommand_0_w) [all...] |
i82586.c | 246 static unsigned short ioaddr, irq, scb_base; variable 311 outb(0, ioaddr + I82586_ATTN); 328 outb(0x20, ioaddr + MISC_CTRL); 345 outb(0xA0, ioaddr + MISC_CTRL); 350 outb(0, ioaddr + I82586_ATTN); 363 outb(0, ioaddr + I82586_ATTN); 367 outb(0x80, ioaddr + MISC_CTRL); 488 outb(0, ioaddr + I82586_ATTN); 490 outb(0, ioaddr + NI52_RESET); 497 static int t507_probe1(struct nic *nic, unsigned short ioaddr) [all...] |
depca.c | 239 #define DEPCA_NICSR ioaddr+0x00 /* Network interface CSR */ 240 #define DEPCA_RBI ioaddr+0x02 /* RAM buffer index (2k buffer mode) */ 241 #define DEPCA_DATA ioaddr+0x04 /* LANCE registers' data port */ 242 #define DEPCA_ADDR ioaddr+0x06 /* LANCE registers' address port */ 243 #define DEPCA_HBASE ioaddr+0x08 /* EISA high memory base address reg. */ 244 #define DEPCA_PROM ioaddr+0x0c /* Ethernet address ROM data port */ 245 #define DEPCA_CNFG ioaddr+0x0c /* EISA Configuration port */ 246 #define DEPCA_RBSA ioaddr+0x0e /* RAM buffer starting address (2k buff.) */ 464 static unsigned short ioaddr = 0; variable 721 adapter_name[adapter], ioaddr, mem_start, mem_start + mem_len [all...] |
pci.c | 404 unsigned int membase, ioaddr, romaddr; local 441 pcibios_read_config_dword(bus, devfn, reg, &ioaddr); 443 if ((ioaddr & PCI_BASE_ADDRESS_IO_MASK) == 0 || (ioaddr & PCI_BASE_ADDRESS_SPACE_IO) == 0) 446 ioaddr &= PCI_BASE_ADDRESS_IO_MASK; 454 pcidev[i].name, ioaddr, romaddr); 458 pcidev[i].ioaddr = ioaddr;
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cs89x0.c | 456 unsigned rev_type = 0, ioaddr, ioidx, isa_cnf, cs_revision; local 460 for (ioidx = 0; (ioaddr=netcard_portlist[ioidx++]) != 0; ) { 464 if (ioaddr & 1) { 465 ioaddr &= ~1; 466 if ((inw(ioaddr + ADD_PORT) & ADD_MASK) != ADD_SIG) 468 outw(PP_ChipID, ioaddr + ADD_PORT); 471 if (inw(ioaddr + DATA_PORT) != CHIP_EISA_ID_SIG) 473 eth_nic_base = ioaddr; 645 if (ioaddr == 0)
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/external/qemu/ |
softmmu_template.h | 104 target_phys_addr_t ioaddr; local 122 ioaddr = env->iotlb[mmu_idx][index]; 123 res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); 197 target_phys_addr_t ioaddr; local 209 ioaddr = env->iotlb[mmu_idx][index]; 210 res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); 279 target_phys_addr_t ioaddr; local 297 ioaddr = env->iotlb[mmu_idx][index]; 298 glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); 371 target_phys_addr_t ioaddr; local [all...] |
/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
comstats.h | 89 unsigned long ioaddr; member in struct:__anon39305
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
comstats.h | 89 unsigned long ioaddr; member in struct:__anon40896
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
comstats.h | 89 unsigned long ioaddr; member in struct:__anon42410
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