| /dalvik/vm/compiler/template/ia32/ |
| header.S | 21 #define rPC %esi
|
| TEMPLATE_INTERPRET.S | 6 * will be located at *rp. When called from static code, rPC is
13 * we got here via chaining. Otherwise, we'll assume rPC is valid.
33 movl %eax,rPC
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| /dalvik/vm/mterp/armv5te/ |
| OP_BREAKPOINT.S | 9 mov r0, rPC
10 bl dvmGetOriginalOpcode @ (rPC)
|
| header.S | 57 r4 rPC interpreted program counter, used for fetching instructions
69 #define rPC r4
76 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
77 #define SAVE_PC_TO_SELF() str rPC, [rSELF, #offThread_pc]
80 #define LOAD_PC_FP_FROM_SELF() ldmia rSELF, {rPC, rFP}
81 #define SAVE_PC_FP_TO_SELF() stmia rSELF, {rPC, rFP}
93 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
104 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
106 #define FETCH_INST() ldrh rINST, [rPC]
[all...] |
| /dalvik/vm/mterp/mips/ |
| OP_BREAKPOINT.S | 9 move a0, rPC
10 JAL(dvmGetOriginalOpcode) # (rPC)
|
| /dalvik/vm/mterp/x86/ |
| OP_BREAKPOINT.S | 12 movl rPC,OUT_ARG0(%esp)
16 movzbl 1(rPC),rINST
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| OP_MOVE_16.S | 4 movzwl 4(rPC),%ecx # ecx<- BBBB
5 movzwl 2(rPC),%eax # eax<- AAAA
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| binopLit8.S | 13 movzbl 2(rPC),%eax # eax<- BB
14 movsbl 3(rPC),%ecx # ecx<- ssssssCC
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| OP_CONST_16.S | 3 movswl 2(rPC),%ecx # ecx<- ssssBBBB
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| OP_ADD_DOUBLE.S | 5 movzbl 2(rPC),%eax # eax<- BB
6 movzbl 3(rPC),%ecx # ecx<- CC
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| OP_CONST_WIDE.S | 3 movl 2(rPC),%eax # eax<- lsw
5 movl 6(rPC),rINST # rINST<- msw
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| OP_GOTO_16.S | 10 movswl 2(rPC),%eax # eax<- ssssAAAA
17 jne common_updateProfile # set up %ebx & %edx & rPC
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| OP_GOTO_32.S | 10 movl 2(rPC),%eax # eax<- AAAAAAAA
17 jne common_updateProfile # set up %ebx & %edx & rPC
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| OP_MOVE_WIDE_16.S | 4 movzwl 4(rPC),%ecx # ecx<- BBBB
5 movzwl 2(rPC),%eax # eax<- AAAA
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| OP_MUL_DOUBLE.S | 5 movzbl 2(rPC),%eax # eax<- BB
6 movzbl 3(rPC),%ecx # ecx<- CC
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| OP_MUL_INT.S | 6 movzbl 2(rPC),%eax # eax<- BB
7 movzbl 3(rPC),%ecx # ecx<- CC
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| OP_MUL_INT_LIT8.S | 3 movzbl 2(rPC),%eax # eax<- BB
4 movsbl 3(rPC),%ecx # ecx<- ssssssCC
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| OP_SUB_DOUBLE.S | 5 movzbl 2(rPC),%eax # eax<- BB
6 movzbl 3(rPC),%ecx # ecx<- CC
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| binflop.S | 7 movzbl 2(rPC),%eax # eax<- CC
8 movzbl 3(rPC),%ecx # ecx<- BB
|
| binop.S | 12 movzbl 2(rPC),%eax # eax<- BB
13 movzbl 3(rPC),%ecx # ecx<- CC
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| binop1.S | 7 movzbl 2(rPC),%eax # eax<- BB
8 movzbl 3(rPC),%ecx # ecx<- CC
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| OP_CONST_HIGH16.S | 3 movzwl 2(rPC),%eax # eax<- 0000BBBB
|
| /dalvik/vm/compiler/template/armv5te/ |
| header.S | 64 r4 rPC interpreted program counter, used for fetching instructions
74 #define rPC r4
89 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
|
| /dalvik/vm/compiler/codegen/x86/ |
| LowerMove.cpp | 36 rPC += 1;
48 rPC += 2;
60 rPC += 3;
72 rPC += 1;
83 rPC += 2;
94 rPC += 3;
110 rPC += 1;
126 rPC += 1;
144 rPC += 1;
|
| LowerAlu.cpp | 38 rPC += 1;
50 rPC += 1;
64 rPC += 1;
77 rPC += 1;
90 rPC += 1;
105 rPC += 1;
119 rPC += 1;
130 rPC += 1;
141 rPC += 1;
152 rPC += 1
[all...] |
