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    Searched refs:s_reg (Results 1 - 21 of 21) sorted by null

  /art/compiler/dex/
local_value_numbering.h 27 // Key is s_reg, value is value name.
85 void SetOperandValue(uint16_t s_reg, uint16_t value) {
86 SregValueMap::iterator it = sreg_value_map_.find(s_reg);
90 sreg_value_map_.Put(s_reg, value);
94 uint16_t GetOperandValue(int s_reg) {
96 SregValueMap::iterator it = sreg_value_map_.find(s_reg);
101 res = LookupValue(NO_VALUE, s_reg, NO_VALUE, NO_VALUE);
102 sreg_value_map_.Put(s_reg, res);
107 void SetOperandValueWide(uint16_t s_reg, uint16_t value) {
108 SregValueMap::iterator it = sreg_wide_value_map_.find(s_reg);
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vreg_analysis.cc 390 loc[ct->s_reg].location = kLocCompilerTemp;
391 loc[ct->s_reg].defined = true;
401 int s_reg = num_regs - num_ins; local
404 reg_location_[s_reg].defined = true;
405 reg_location_[s_reg].ref = true;
406 s_reg++;
413 reg_location_[s_reg].wide = true;
414 reg_location_[s_reg+1].high_word = true;
415 reg_location_[s_reg+1].fp = true;
416 DCHECK_EQ(SRegToVReg(s_reg)+1, SRegToVReg(s_reg+1))
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mir_graph.h 193 int s_reg; member in struct:art::CompilerTemp
447 bool IsConst(int32_t s_reg) const {
448 return is_constant_v_->IsBitSet(s_reg);
460 int32_t ConstantValue(int32_t s_reg) const {
461 DCHECK(IsConst(s_reg));
462 return constant_values_[s_reg];
661 int GetSSAUseCount(int s_reg);
mir_dataflow.cc 1248 int s_reg = mir->ssa_rep->uses[i]; local
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mir_optimization.cc 206 int MIRGraph::GetSSAUseCount(int s_reg) {
207 return raw_use_counts_.Get(s_reg);
748 // Mark s_reg as null-checked
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  /art/compiler/dex/quick/
ralloc_util.cc 57 regs[i].s_reg = INVALID_SREG;
67 p[i].live, p[i].dirty, p[i].s_reg, reinterpret_cast<uintptr_t>(p[i].def_start),
81 void Mir2Lir::ClobberSRegBody(RegisterInfo* p, int num_regs, int s_reg) {
83 if (p[i].s_reg == s_reg) {
104 void Mir2Lir::ClobberSReg(int s_reg) {
107 if (s_reg == live_sreg_) {
111 ClobberSRegBody(reg_pool_->core_regs, reg_pool_->num_core_regs, s_reg);
112 ClobberSRegBody(reg_pool_->FPRegs, reg_pool_->num_fp_regs, s_reg);
124 int Mir2Lir::SRegToPMap(int s_reg) {
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mir_to_lir.h 189 int s_reg; member in struct:art::Mir2Lir::RefCounts
207 int s_reg; // Name of live value. member in struct:art::Mir2Lir::RegisterInfo
309 bool oat_live_out(int s_reg);
321 void ClobberSRegBody(RegisterInfo* p, int num_regs, int s_reg);
322 void ClobberSReg(int s_reg);
323 int SRegToPMap(int s_reg);
324 void RecordCorePromotion(int reg, int s_reg);
325 int AllocPreservedCoreReg(int s_reg);
326 void RecordFpPromotion(int reg, int s_reg);
327 int AllocPreservedSingle(int s_reg, bool even)
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mir_to_lir-inl.h 31 p->s_reg = INVALID_SREG;
gen_common.cc 67 LIR* Mir2Lir::GenNullCheck(int s_reg, int m_reg, int opt_flags) {
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  /art/compiler/dex/quick/mips/
codegen_mips.h 33 LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg);
35 int s_reg);
38 int r_dest, int r_dest_hi, OpSize size, int s_reg);
45 int r_src, int r_src_hi, OpSize size, int s_reg);
165 int s_reg);
utility_mips.cc 435 int r_dest_hi, OpSize size, int s_reg) {
438 * on base (which must have an associated s_reg and MIR). If not
533 OpSize size, int s_reg) {
535 size, s_reg);
539 int r_dest_lo, int r_dest_hi, int s_reg) {
540 return LoadBaseDispBody(rBase, displacement, r_dest_lo, r_dest_hi, kLong, s_reg);
646 int r_src, int r_src_hi, OpSize size, int s_reg) {
658 int r_dest, int r_dest_hi, OpSize size, int s_reg) {
target_mips.cc 308 void MipsMir2Lir::MarkPreservedSingle(int s_reg, int reg) {
326 if (mir_graph_->SRegToVReg(info2->s_reg) < mir_graph_->SRegToVReg(info1->s_reg))
328 int v_reg = mir_graph_->SRegToVReg(info1->s_reg);
337 int v_reg = mir_graph_->SRegToVReg(info->s_reg);
  /art/compiler/dex/quick/arm/
codegen_arm.h 32 LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg);
34 int s_reg);
37 int r_dest, int r_dest_hi, OpSize size, int s_reg);
44 int r_src, int r_src_hi, OpSize size, int s_reg);
165 int s_reg);
182 int InPosition(int s_reg);
utility_arm.cc 765 * on base (which must have an associated s_reg and MIR). If not
769 int r_dest_hi, OpSize size, int s_reg) {
798 -1, kWord, s_reg);
889 OpSize size, int s_reg) {
890 return LoadBaseDispBody(rBase, displacement, r_dest, -1, size, s_reg);
894 int r_dest_hi, int s_reg) {
895 return LoadBaseDispBody(rBase, displacement, r_dest_lo, r_dest_hi, kLong, s_reg);
1044 int s_reg) {
1056 int s_reg) {
target_arm.cc 626 if (mir_graph_->SRegToVReg(info2->s_reg) <
627 mir_graph_->SRegToVReg(info1->s_reg))
629 int v_reg = mir_graph_->SRegToVReg(info1->s_reg);
638 int v_reg = mir_graph_->SRegToVReg(info->s_reg);
call_arm.cc 28 int ArmMir2Lir::InPosition(int s_reg) {
29 int v_reg = mir_graph_->SRegToVReg(s_reg);
  /art/compiler/dex/portable/
mir_to_gbc.h 80 ::llvm::Value* GetLLVMValue(int s_reg);
81 void SetVregOnValue(::llvm::Value* val, int s_reg);
82 void DefineValueOnly(::llvm::Value* val, int s_reg);
83 void DefineValue(::llvm::Value* val, int s_reg);
mir_to_gbc.cc 49 ::llvm::Value* MirConverter::GetLLVMValue(int s_reg) {
50 return llvm_values_.Get(s_reg);
53 void MirConverter::SetVregOnValue(::llvm::Value* val, int s_reg) {
57 int v_reg = mir_graph_->SRegToVReg(s_reg);
64 void MirConverter::DefineValueOnly(::llvm::Value* val, int s_reg) {
65 ::llvm::Value* placeholder = GetLLVMValue(s_reg);
73 llvm_values_.Put(s_reg, val);
79 void MirConverter::DefineValue(::llvm::Value* val, int s_reg) {
80 DefineValueOnly(val, s_reg);
81 SetVregOnValue(val, s_reg);
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  /art/compiler/dex/quick/x86/
utility_x86.cc 346 int s_reg) {
451 int r_dest, OpSize size, int s_reg) {
453 r_dest, INVALID_REG, size, s_reg);
457 int r_dest_lo, int r_dest_hi, int s_reg) {
459 r_dest_lo, r_dest_hi, kLong, s_reg);
464 int s_reg) {
codegen_x86.h 33 LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg);
35 int s_reg);
38 int r_dest, int r_dest_hi, OpSize size, int s_reg);
45 int r_src, int r_src_hi, OpSize size, int s_reg);
target_x86.cc 330 if (mir_graph_->SRegToVReg(info2->s_reg) < mir_graph_->SRegToVReg(info1->s_reg))
332 int v_reg = mir_graph_->SRegToVReg(info1->s_reg);
341 int v_reg = mir_graph_->SRegToVReg(info->s_reg);

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