/dalvik/vm/compiler/codegen/x86/ |
LowerAlu.cpp | 394 alu_binary_imm_reg(OpndSize_32, sar_opc, 24, 1, false); 420 alu_binary_imm_reg(OpndSize_32, sar_opc, 16, 1, false); 545 int retval = common_shift_int(sar_opc, vA, v1, v2); 653 int retval = common_shift_int(sar_opc, vA, v1, v2); 872 int retval = common_shift_int_lit(sar_opc, vA, vB, tmp); 971 int retval = common_shift_int_lit(sar_opc, vA, vB, tmp); 1012 alu_binary_imm_reg(OpndSize_32, sar_opc, 1, 1, false); 1023 alu_binary_imm_reg(OpndSize_32, sar_opc, power-1, 1, false); 1026 alu_binary_imm_reg(OpndSize_32, sar_opc, power, 1, false); [all...] |
LowerInvoke.cpp | [all...] |
/dalvik/vm/compiler/codegen/x86/libenc/ |
enc_wrapper.h | 87 sal_opc, sar_opc, enumerator in enum:ALU_Opcode
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encoder.h | 129 sar_opc, ror_opc, max_shift_opcode=6, n_shift = 6 enumerator in enum:Shift_Opcode
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