| /external/skia/tools/ |
| bench_pictures_cfg_helper.py | 16 def TileArgs(tile_x, tile_y, timeIndividualTiles=True):
17 config = {'mode': ['tile', str(tile_x), str(tile_y)]}
31 def TiledBitmapConfig(tile_x, tile_y, timeIndividualTiles=True, **kwargs):
32 return BitmapConfig(**dict(TileArgs(tile_x, tile_y,
36 def TiledGPUConfig(tile_x, tile_y, **kwargs):
37 return GPUConfig(**dict(TileArgs(tile_x, tile_y).items() + kwargs.items()))
40 def TiledConfig(tile_x, tile_y, timeIndividualTiles=True, **kwargs):
41 return Config(**dict(TileArgs(tile_x, tile_y,
63 def CopyTilesConfig(tile_x, tile_y, **kwargs):
64 return BitmapConfig(mode=['copyTile', str(tile_x), str(tile_y)], **kwargs
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| gen7_misc_state.c | 109 uint32_t tile_x = 0, tile_y = 0; local
120 tile_y = draw_y & tile_mask_y;
129 * We have no guarantee that tile_x and tile_y are correctly aligned,
134 * tile_x and tile_y to 0. This is a temporary workaround until we
138 tile_y &= ~7;
143 ((srb->Base.Base.Height + tile_y - 1) << 18);
152 OUT_BATCH(tile_x | (tile_y << 16));
157 uint32_t tile_x, tile_y, offset; local
162 tile_y = draw_y & tile_mask_y;
171 * We have no guarantee that tile_x and tile_y are correctly aligned
[all...] |
| brw_misc_state.c | 372 uint32_t tile_x, tile_y; local
399 tile_y = draw_y & tile_mask_y;
408 * We have no guarantee that tile_x and tile_y are correctly aligned,
413 * tile_x and tile_y to 0. This is a temporary workaround until we come
418 tile_y &= ~7;
431 (stencil_irb->Base.Base.Height + tile_y - 1) << 19);
435 OUT_BATCH(tile_x | (tile_y << 16));
437 assert(tile_x == 0 && tile_y == 0);
446 uint32_t tile_x, tile_y, offset; local
457 tile_y = draw_y & tile_mask_y
[all...] |
| brw_blorp.cpp | 126 uint32_t *tile_y) const
135 *tile_y = y_offset & mask_y;
|
| gen6_blorp.cpp | 427 uint32_t tile_x, tile_y; local
439 surf[1] = (surface->compute_tile_offsets(&tile_x, &tile_y) +
462 assert(tile_y % 2 == 0);
464 (tile_y / 2) << BRW_SURFACE_Y_OFFSET_SHIFT |
842 uint32_t tile_y = draw_y & tile_mask_y; local
855 * We have no guarantee that tile_x and tile_y are correctly aligned,
860 * tile_x and tile_y to 0. This is a temporary workaround until we come
864 tile_y &= ~7;
885 (params->depth.height + tile_y - 1) << 19);
888 tile_y << 16)
[all...] |
| gen7_blorp.cpp | 153 uint32_t tile_x, tile_y; local
171 surf->ss1.base_addr = surface->compute_tile_offsets(&tile_x, &tile_y);
178 assert(tile_y % 2 == 0);
180 surf->ss5.y_offset = tile_y / 2;
590 uint32_t tile_y = draw_y & tile_mask_y; local
603 * We have no guarantee that tile_x and tile_y are correctly aligned,
608 * tile_x and tile_y to 0. This is a temporary workaround until we come
612 tile_y &= ~7;
629 (params->depth.height + tile_y - 1) << 18);
632 tile_y << 16)
[all...] |
| brw_blorp.h | 107 uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
|
| gen7_wm_surface_state.c | 510 uint32_t tile_x, tile_y; local
552 surf->ss1.base_addr = intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
560 assert(tile_y % 2 == 0);
562 surf->ss5.y_offset = tile_y / 2;
|
| brw_wm_surface_state.c | 1125 uint32_t tile_x, tile_y; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen7_misc_state.c | 109 uint32_t tile_x = 0, tile_y = 0; local
120 tile_y = draw_y & tile_mask_y;
129 * We have no guarantee that tile_x and tile_y are correctly aligned,
134 * tile_x and tile_y to 0. This is a temporary workaround until we
138 tile_y &= ~7;
143 ((srb->Base.Base.Height + tile_y - 1) << 18);
152 OUT_BATCH(tile_x | (tile_y << 16));
157 uint32_t tile_x, tile_y, offset; local
162 tile_y = draw_y & tile_mask_y;
171 * We have no guarantee that tile_x and tile_y are correctly aligned
[all...] |
| brw_misc_state.c | 372 uint32_t tile_x, tile_y; local
399 tile_y = draw_y & tile_mask_y;
408 * We have no guarantee that tile_x and tile_y are correctly aligned,
413 * tile_x and tile_y to 0. This is a temporary workaround until we come
418 tile_y &= ~7;
431 (stencil_irb->Base.Base.Height + tile_y - 1) << 19);
435 OUT_BATCH(tile_x | (tile_y << 16));
437 assert(tile_x == 0 && tile_y == 0);
446 uint32_t tile_x, tile_y, offset; local
457 tile_y = draw_y & tile_mask_y
[all...] |
| brw_blorp.cpp | 126 uint32_t *tile_y) const
135 *tile_y = y_offset & mask_y;
|
| gen6_blorp.cpp | 427 uint32_t tile_x, tile_y; local
439 surf[1] = (surface->compute_tile_offsets(&tile_x, &tile_y) +
462 assert(tile_y % 2 == 0);
464 (tile_y / 2) << BRW_SURFACE_Y_OFFSET_SHIFT |
842 uint32_t tile_y = draw_y & tile_mask_y; local
855 * We have no guarantee that tile_x and tile_y are correctly aligned,
860 * tile_x and tile_y to 0. This is a temporary workaround until we come
864 tile_y &= ~7;
885 (params->depth.height + tile_y - 1) << 19);
888 tile_y << 16)
[all...] |
| gen7_blorp.cpp | 153 uint32_t tile_x, tile_y; local
171 surf->ss1.base_addr = surface->compute_tile_offsets(&tile_x, &tile_y);
178 assert(tile_y % 2 == 0);
180 surf->ss5.y_offset = tile_y / 2;
590 uint32_t tile_y = draw_y & tile_mask_y; local
603 * We have no guarantee that tile_x and tile_y are correctly aligned,
608 * tile_x and tile_y to 0. This is a temporary workaround until we come
612 tile_y &= ~7;
629 (params->depth.height + tile_y - 1) << 18);
632 tile_y << 16)
[all...] |
| brw_blorp.h | 107 uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
|
| gen7_wm_surface_state.c | 510 uint32_t tile_x, tile_y; local
552 surf->ss1.base_addr = intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
560 assert(tile_y % 2 == 0);
562 surf->ss5.y_offset = tile_y / 2;
|
| /external/chromium_org/third_party/libwebp/dsp/ |
| lossless.c | 522 int tile_x, int tile_y, int bits,
527 const int row_start = tile_y << bits;
578 int tile_x, int tile_y, int bits, int mode,
582 const int row_start = tile_y << bits;
621 int tile_y; local
624 for (tile_y = 0; tile_y < tiles_per_col; ++tile_y) {
625 const int tile_y_offset = tile_y * max_tile_size;
627 (tile_y < tiles_per_col - 1) ? max_tile_size : height - tile_y_offset
1007 int tile_y; local
[all...] |
| /external/webp/src/dsp/ |
| lossless.c | 522 int tile_x, int tile_y, int bits,
527 const int row_start = tile_y << bits;
578 int tile_x, int tile_y, int bits, int mode,
582 const int row_start = tile_y << bits;
621 int tile_y; local
624 for (tile_y = 0; tile_y < tiles_per_col; ++tile_y) {
625 const int tile_y_offset = tile_y * max_tile_size;
627 (tile_y < tiles_per_col - 1) ? max_tile_size : height - tile_y_offset
1007 int tile_y; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
| intel_span.c | 76 uint32_t tile_y = y / tile_height; local
82 uintptr_t u = tile_y * row_size
|
| intel_fbo.h | 167 uint32_t *tile_y);
|
| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| intel_span.c | 76 uint32_t tile_y = y / tile_height; local
82 uintptr_t u = tile_y * row_size
|
| intel_fbo.h | 167 uint32_t *tile_y);
|
| /external/skia/bench/ |
| tile_analyze.py | 145 [tile_x, tile_y] = [int(i) for i in tile_size.split('x')]
148 viewport_rows = int(math.ceil(viewport_y * 1.0 / tile_y))
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/llvmpipe/ |
| lp_rast.c | 340 const unsigned tile_x = task->x, tile_y = task->y; local
367 tile_x + x, tile_y + y);
370 depth = lp_rast_get_depth_block_pointer(task, tile_x + x, tile_y + y);
375 tile_x + x, tile_y + y,
|
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_rast.c | 340 const unsigned tile_x = task->x, tile_y = task->y; local
367 tile_x + x, tile_y + y);
370 depth = lp_rast_get_depth_block_pointer(task, tile_x + x, tile_y + y);
375 tile_x + x, tile_y + y,
|
