/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
st_mesa_to_tgsi.c | 448 unsigned bit = 1 << i; local 450 if (dst.WriteMask & bit) { 451 if (positive_one_mask & bit) { 456 else if (negative_one_mask & bit) { 461 else if (zero_mask & bit) { 470 if (negate_mask & bit) { [all...] |
/external/chromium_org/third_party/zlib/ |
deflate.c | 191 * Initialize the hash table (avoiding 64K overflow for 16 bit systems). 550 * Put a short in the pending buffer. The 16-bit value is put in MSB order. 1082 IPos bit = offset & 7; local 1120 IPos bit = window_offset & 7; local [all...] |
/external/libppp/src/ |
ipcp.c | 599 u_int32_t bit, haddr; local 603 bit = 1; 607 if (!(haddr & bit)) 609 } while (bit <<= 1); [all...] |
/external/libselinux/src/ |
avc.c | 607 access_vector_t bit = 1; local 617 if (av & bit) { 618 permstr = security_av_perm_to_string(tclass, bit); 622 av &= ~bit; 624 bit <<= 1;
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/external/lzma/Java/SevenZip/Compression/LZMA/ |
Decoder.java | 78 int bit = rangeDecoder.DecodeBit(m_Decoders, ((1 + matchBit) << 8) + symbol);
local 79 symbol = (symbol << 1) | bit;
80 if (matchBit != bit)
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_lowering_nv50.cpp | 30 // nv50 doesn't support 32 bit integer multiplication 223 // remove pseudo operations and non-fixed no-ops, split 64 bit operations 318 i->getDef(0)->reg.size = 2; // $aX are only 16 bit 628 // The lanes of a quad are grouped by the bit in the condition register they 653 Value *bit = bld.getSSA(); local 657 bld.mkMov(bit, imm)->setPredicate(CC_EQ, pred); 658 cond->setSrc(l, bit); 995 int id = i->getSrc(0)->reg.data.offset / 4; // in 32 bit reg units
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_wm_fp.c | 162 int bit = ffs( ~c->fp_temp ); local 164 if (!bit) { 169 c->fp_temp |= 1<<(bit-1); 170 return dst_reg(PROGRAM_TEMPORARY, FIRST_INTERNAL_TEMP+(bit-1));
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/external/mesa3d/src/mesa/state_tracker/ |
st_mesa_to_tgsi.c | 448 unsigned bit = 1 << i; local 450 if (dst.WriteMask & bit) { 451 if (positive_one_mask & bit) { 456 else if (negative_one_mask & bit) { 461 else if (zero_mask & bit) { 470 if (negate_mask & bit) { [all...] |
/external/qemu/ |
kvm-all.c | 337 unsigned bit = nr % (sizeof(*bitmap) * 8); local 339 if ((bitmap[word] >> bit) & 1) {
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/external/tcpdump/ |
print-802_11.c | 962 /* There may be a problem w/ AP not having this bit set */ 1006 print_radiotap_field(struct cpack_state *s, u_int32_t bit, int *pad) 1018 switch (bit) { 1055 /* this bit indicates a field whose 1059 printf("[0x%08x] ", bit); 1068 switch (bit) { 1134 #define BIT(n) (1 << n) 1136 (EXTRACT_LE_32BITS(__p) & BIT(IEEE80211_RADIOTAP_EXT)) != 0 1142 enum ieee80211_radiotap_type bit; local 1186 /* clear the least significant bit that is set * [all...] |
/art/runtime/ |
dex_file_verifier.cc | 204 uint32_t bit = MapTypeToBitMask(item->type_); local 206 if (bit == 0) { 211 if ((used_bits & bit) != 0) { 216 used_bits |= bit; 706 // Special case of bit pattern 0xxx. 719 // No extra checks necessary for bit pattern 0xxx. 726 // Illegal bit patterns 10xx or 1111. 732 // Bit pattern 110x has an additional byte. 746 // Bit pattern 1110 has 2 additional bytes. [all...] |
/dalvik/vm/analysis/ |
RegisterMap.cpp | 158 ALOGI("Register Map bit difference stats:"); 366 * Given a line of registers, output a bit vector that indicates whether 371 * in the low bit of the first byte. 382 val |= 0x80; /* set hi bit */ 539 ALOGE("GLITCH: addr %d reg %d: bit=%d reg=%d(%d)", 562 * Advance "ptr" to ensure 32-bit alignment. 768 /* a bit late */ 1102 Each entry consists of an address and a bit vector. Adjacent entries are 1107 bit vectors. However, the register values at a given address do not 1315 int prev, cur, bit; local [all...] |
/external/chromium_org/components/autofill/core/browser/ |
form_structure.cc | 66 // Helper for |EncodeUploadRequest()| that creates a bit field corresponding to 70 // so we need ceil(MAX_VALID_FIELD_TYPE / 8) bytes to encode the bit field. 79 // Set the appropriate bit in the field. The bit we set is the one 82 const size_t bit = 0x80 >> (*field_type % 8); local 84 bit_field[byte] |= bit; [all...] |
/external/chromium_org/third_party/lzma_sdk/ |
LzmaDec.c | 184 unsigned bit; local 187 bit = (matchByte & offs); 188 probLit = prob + offs + bit + symbol; 189 GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit) 528 unsigned bit; local 531 bit = (matchByte & offs); 532 probLit = prob + offs + bit + symbol; 533 GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit) [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
u_vbuf.c | 55 uint32_t incompatible_elem_mask; /* each bit describes a corresp. attrib */ 120 uint32_t user_vb_mask; /* each bit describes a corresp. buffer */ 122 uint32_t incompatible_vb_mask; /* each bit describes a corresp. buffer */ 124 uint32_t nonzero_stride_vb_mask; /* each bit describes a corresp. buffer */ 386 /* Set the bit for each buffer which is incompatible, or isn't set. */ 482 unsigned bit, vb_index = mgr->ve->ve[i].vertex_buffer_index; local 483 bit = 1 << vb_index; 487 (!unroll_indices || !(mask[VB_VERTEX] & bit))) { 494 if (mask[type] & bit) { [all...] |
/external/chromium_org/third_party/ots/third_party/lzma_sdk/ |
LzmaDec.c | 185 unsigned bit; local 188 bit = (matchByte & offs); 189 probLit = prob + offs + bit + symbol; 190 GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit) 529 unsigned bit; local 532 bit = (matchByte & offs); 533 probLit = prob + offs + bit + symbol; 534 GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit) [all...] |
/external/clang/test/CodeGenCXX/ |
mangle.cpp | 712 enum { bit }; enumerator in enum:test28::A::__anon18488 715 template <class T> void foo(decltype(A<T>::A::bit) x); 718 foo<char>(A<char>::bit);
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/external/libsepol/src/ |
write.c | 58 uint32_t buf[32], bit, count; local 75 bit = cpu_to_le32(n->startbit); 76 items = put_entry(&bit, sizeof(uint32_t), 1, fp); [all...] |
/external/lzma/C/ |
LzmaDec.c | 184 unsigned bit;
local 187 bit = (matchByte & offs);
188 probLit = prob + offs + bit + symbol;
189 GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit)
528 unsigned bit;
local 531 bit = (matchByte & offs);
532 probLit = prob + offs + bit + symbol;
533 GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit)
[all...] |
/external/mesa3d/src/gallium/auxiliary/util/ |
u_vbuf.c | 55 uint32_t incompatible_elem_mask; /* each bit describes a corresp. attrib */ 120 uint32_t user_vb_mask; /* each bit describes a corresp. buffer */ 122 uint32_t incompatible_vb_mask; /* each bit describes a corresp. buffer */ 124 uint32_t nonzero_stride_vb_mask; /* each bit describes a corresp. buffer */ 386 /* Set the bit for each buffer which is incompatible, or isn't set. */ 482 unsigned bit, vb_index = mgr->ve->ve[i].vertex_buffer_index; local 483 bit = 1 << vb_index; 487 (!unroll_indices || !(mask[VB_VERTEX] & bit))) { 494 if (mask[type] & bit) { [all...] |
/frameworks/base/packages/WAPPushManager/tests/src/com/android/smspush/unitTests/ |
WapPushTest.java | 819 int bit = 1; local 826 if ((bit & uint32Val) > 0) topbit = i; 827 bit = (bit << 1); 978 int bit = 1; local [all...] |
/dalvik/libdex/ |
DexSwapVerify.cpp | 257 * Set the given bit in pDefinedClassBits, returning its former value. 261 u4 bit = 1 << (typeIdx & 0x1f); local 263 bool result = (*element & bit) != 0; 265 *element |= bit; 342 * one-bit-on integer, suitable for use in an int-sized bit set. 401 u4 usedBits = 0; // Bit set: one bit per section 448 u4 bit = mapTypeToBitMask(item->type); local 450 if (bit == 0) [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/main/ |
ffvertex_prog.c | 381 int bit = ffs( ~p->temp_in_use ); local 382 if (!bit) { 387 if ((GLuint) bit > p->program->Base.NumTemporaries) 388 p->program->Base.NumTemporaries = bit; 390 p->temp_in_use |= 1<<(bit-1); 391 return make_ureg(PROGRAM_TEMPORARY, bit-1); 518 /* This is a bit sad as the support is there to pull the whole [all...] |
/external/chromium_org/v8/src/mips/ |
assembler-mips.h | 121 int bit() const { function in struct:v8::internal::Register 194 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to 195 // number of Double regs (64-bit regs, or FPU-reg-pairs). 243 int bit() const { function in struct:v8::internal::FPURegister 256 // 32-bit registers, f0 through f31. When used as 'double' they are used 259 // (Modern mips hardware also supports 32 64-bit registers, via setting 260 // (priviledged) Status Register FR bit to 1. This is used by the N32 ABI, 263 // For O32 ABI, Floats and Doubles refer to same set of 32 32-bit registers. 323 int bit() const { function in struct:v8::internal::FPUControlRegister 533 // Number of consecutive instructions used to store 32bit constant [all...] |
/external/dropbear/libtommath/mtest/ |
mpi.c | 1267 int dig, bit; local 1287 for(bit = 0; bit < DIGIT_BIT; bit++) { 1640 int dig, bit; local 3752 mp_size dig, bit; local [all...] |