| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| ExternalFunctions.cpp | 255 std::map<const Function *, ExFunc>::iterator FI = ExportedFunctions->find(F);
256 if (ExFunc Fn = (FI == ExportedFunctions->end()) ? lookupFunction(F)
257 : FI->second) {
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 476 int FI = cast<FrameIndexSDNode>(Node)->getIndex();
478 SDValue TFI = CurDAG->getTargetFrameIndex(FI, PtrTy);
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 121 int FI = CSI[i].getFrameIdx();
129 FramePtrSpillFI = FI;
130 AFI->addGPRCalleeSavedArea1Frame(FI);
138 FramePtrSpillFI = FI;
140 AFI->addGPRCalleeSavedArea2Frame(FI);
143 AFI->addGPRCalleeSavedArea1Frame(FI);
148 AFI->addDPRCalleeSavedAreaFrame(FI);
|
| ARMFrameLowering.cpp | 176 int FI = CSI[i].getFrameIdx();
184 FramePtrSpillFI = FI;
185 AFI->addGPRCalleeSavedArea1Frame(FI);
193 FramePtrSpillFI = FI;
195 AFI->addGPRCalleeSavedArea2Frame(FI);
198 AFI->addGPRCalleeSavedArea1Frame(FI);
205 D8SpillFI = FI;
207 AFI->addDPRCalleeSavedAreaFrame(FI);
480 /// getFrameIndexReference - Provide a base+offset reference to an FI slot for
485 ARMFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 406 int FI = cast<FrameIndexSDNode>(Node)->getIndex();
407 SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16);
|
| MSP430ISelLowering.cpp | 378 int FI = MFI->CreateFixedObject(Flags.getByValSize(),
380 InVal = DAG.getFrameIndex(FI, getPointerTy());
390 int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset(), true);
394 SDValue FIN = DAG.getFrameIndex(FI, MVT::i16);
396 MachinePointerInfo::getFixedStack(FI),
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | 52 int FI;
|
| PPCRegisterInfo.cpp | 366 /// stw rA, FI ; Store rA to the frame.
518 const PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
519 FrameIdx = FI->getCRSpillFrameIndex();
577 PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
578 int FPSI = FI->getFramePointerSaveIndex();
756 // It's the load/store FI references that cause issues, as it can be difficult
|
| PPCFrameLowering.cpp | 379 PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
380 bool MustSaveLR = FI->mustSaveLR();
381 const SmallVectorImpl<unsigned> &MustSaveCRs = FI->getMustSaveCRs();
392 int FPIndex = FI->getFramePointerSaveIndex();
404 int BPIndex = FI->getBasePointerSaveIndex();
721 PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
722 bool MustSaveLR = FI->mustSaveLR();
723 const SmallVectorImpl<unsigned> &MustSaveCRs = FI->getMustSaveCRs();
734 int FPIndex = FI->getFramePointerSaveIndex();
746 int BPIndex = FI->getBasePointerSaveIndex()
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| TailRecursionElimination.cpp | 436 Function::arg_iterator FI = F->arg_begin(),
438 for (; I != E && FI != FE; ++I, ++FI)
439 if (*I != &*FI) break;
440 if (I == E && FI == FE)
|
| /external/llvm/lib/Transforms/Utils/ |
| LowerSwitch.cpp | 147 Function::iterator FI = OrigBlock;
148 F->getBasicBlockList().insert(++FI, NewNode);
169 Function::iterator FI = OrigBlock;
170 F->getBasicBlockList().insert(++FI, NewLeaf);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelDAGToDAG.cpp | 164 unsigned int FI = FIN->getIndex();
167 SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i32);
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| MacOSKeychainAPIChecker.cpp | 188 ADFunctionInfo FI = FunctionsToTrack[I];
189 if (FI.Name != Name)
192 if (IsAllocator && (FI.DeallocatorIdx == InvalidIdx))
194 if (!IsAllocator && (FI.DeallocatorIdx != InvalidIdx))
516 const ADFunctionInfo &FI = FunctionsToTrack[AP.second->AllocatorIdx];
521 << FunctionsToTrack[FI.DeallocatorIdx].Name << "'.";
|
| /external/llvm/lib/AsmParser/ |
| LLParser.cpp | 178 for (Module::iterator FI = M->begin(), FE = M->end(); FI != FE; )
179 UpgradeCallsToIntrinsic(FI++); // must be post-increment, as we remove
593 FI = ForwardRefMDNodes.find(MetadataID);
594 if (FI != ForwardRefMDNodes.end()) {
595 MDNode *Temp = FI->second.first;
598 ForwardRefMDNodes.erase(FI);
[all...] |
| /external/llvm/lib/CodeGen/ |
| ExecutionDepsFix.cpp | 373 LiveOutMap::const_iterator fi = LiveOuts.find(*pi); local
374 if (fi == LiveOuts.end()) {
378 assert(fi->second && "Can't have NULL entries");
382 LiveRegs[rx].Def = std::max(LiveRegs[rx].Def, fi->second[rx].Def);
384 DomainValue *pdv = resolve(fi->second[rx].Value);
707 LiveOutMap::const_iterator FI = LiveOuts.find(*MBBI);
708 if (FI == LiveOuts.end() || !FI->second)
711 if (FI->second[i].Value)
712 release(FI->second[i].Value)
[all...] |
| MachineFunction.cpp | 647 const TargetFrameLowering *FI = MF.getTarget().getFrameLowering();
648 int ValOffset = (FI ? FI->getOffsetOfLocalArea() : 0);
654 OS << " fi#" << (int)(i-NumFixedObjects) << ": ";
[all...] |
| RegAllocFast.cpp | 288 int FI = getStackSpaceFor(LRI->VirtReg, RC);
289 DEBUG(dbgs() << " to stack slot #" << FI << "\n");
290 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
313 .addFrameIndex(FI).addImm(Offset).addMetadata(MDPtr);
[all...] |
| InlineSpiller.cpp | 233 // %snip = COPY %Reg / FILL fi#
235 // %Reg = COPY %snip / SPILL %snip, fi#
252 int FI;
253 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
257 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
606 int FI;
607 if (Reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
[all...] |
| MachineLICM.cpp | 155 int FI;
156 CandidateInfo(MachineInstr *mi, unsigned def, int fi)
157 : MI(mi), Def(def), FI(fi) {}
387 static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
394 if (Value->getFrameIndex() == FI)
415 int FI = MO.getIndex();
416 if (!StoredFIs.count(FI) &&
417 MFI->isSpillSlotObjectIndex(FI) &&
418 InstructionStoresToFI(MI, FI))
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 113 // load $vr, FI
125 unsigned Dst = I->getOperand(0).getReg(), FI = I->getOperand(1).getIndex();
127 TII.loadRegFromStack(MBB, I, VR, FI, RC, &RegInfo, 0);
134 // store $vr, FI
145 unsigned Src = I->getOperand(0).getReg(), FI = I->getOperand(1).getIndex();
149 TII.storeRegToStack(MBB, I, VR, true, FI, RC, &RegInfo, 0);
154 // load $vr0, FI
156 // load $vr1, FI + 4
169 unsigned Dst = I->getOperand(0).getReg(), FI = I->getOperand(1).getIndex();
175 TII.loadRegFromStack(MBB, I, VR0, FI, RC, &RegInfo, 0)
[all...] |
| /external/clang/include/clang/Lex/ |
| HeaderSearch.h | 414 HeaderFileInfo &FI = getFileInfo(File);
415 FI.isImport = true;
416 FI.isPragmaOnce = true;
|
| /external/llvm/lib/Analysis/ |
| ProfileInfo.cpp | 637 // for (Function::const_iterator FI = F->begin(), FE = F->end();
638 // FI != FE; ++FI) {
639 // const BasicBlock* BB = &(*FI);
726 std::set<const BasicBlock *>::iterator FI = Unvisited.begin(), FE = Unvisited.end();
727 while(FI != FE) {
728 const BasicBlock *BB = *FI; ++FI;
744 FI = Unvisited.begin(), FE = Unvisited.end();
745 while(FI != FE)
[all...] |
| /external/clang/lib/Sema/ |
| SemaExprMember.cpp | 797 FI = indirectField->chain_begin(), FEnd = indirectField->chain_end();
801 FieldDecl *field = cast<FieldDecl>(*FI);
818 ++FI;
820 while (FI != FEnd) {
821 FieldDecl *field = cast<FieldDecl>(*FI++);
829 (FI == FEnd? SS : EmptySS), field,
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 848 int FI;
[all...] |
