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/external/llvm/lib/CodeGen/ |
LocalStackSlotAllocation.cpp | 181 // Then assign frame offsets to stack objects that are not used to spill
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README.txt | 168 not spill slots.
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StackColoring.cpp | 14 // NOTE: This pass is not StackSlotColoring, which optimizes spill slots. 20 // spill slots.
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/external/llvm/lib/Target/ARM/ |
ARMCallingConv.td | 206 // Also save R7-R4 first to match the stack frame fixed spill areas.
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/external/llvm/lib/Target/PowerPC/ |
README_ALTIVEC.txt | 4 registers, to generate better spill code.
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PPCInstrInfo.cpp | 558 // This function returns true if a CR spill is necessary and false otherwise. 638 "VRSAVE only needs spill/restore on Darwin"); 749 "VRSAVE only needs spill/restore on Darwin"); [all...] |
/external/llvm/test/CodeGen/SystemZ/ |
frame-02.ll | 5 ; This function should require all FPRs, but no other spill slots.
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frame-03.ll | 7 ; This function should require all FPRs, but no other spill slots.
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frame-07.ll | 8 ; The frame is big enough to require two emergency spill slots at 160(%r15),
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/external/llvm/test/CodeGen/Thumb2/ |
large-call.ll | 6 ; emergency spill slots at [sp, #4] or [sp, #8] without adjusting the stack
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/external/llvm/test/CodeGen/X86/ |
fold-pcmpeqd-0.ll | 6 ; This testcase shouldn't need to spill the -1 value,
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_wm.h | 121 GLuint spill_slot:16; /* if non-zero, spill immediately after calculation */
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/external/mesa3d/src/mesa/program/ |
register_allocate.c | 557 * Only nodes with a spill cost set (cost != 0.0) will be considered
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/external/v8/src/ia32/ |
lithium-ia32.h | [all...] |
/external/valgrind/main/docs/internals/ |
3_3_BUGSTATUS.txt | 337 vx1853 vx1854 33 n-i-bz regalloc: don't incorrectly omit spill stores
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/external/valgrind/main/exp-sgcheck/docs/ |
sg-manual.xml | 83 possibly an un-accounted for area of the stack (eg, spill slot), so
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/packages/apps/VideoEditor/res/values-nb/ |
strings.xml | 14 <string name="editor_play_exported_movie" msgid="4312100359380734615">"Spill av eksportert film"</string>
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/dalvik/vm/mterp/x86/ |
footer.S | 280 SPILL(rIBASE) 509 movl %edx, TMP_SPILL1(%ebp) # spill self->interpStackEnd [all...] |
/art/compiler/dex/quick/ |
gen_common.cc | [all...] |
/art/runtime/arch/arm/ |
quick_entrypoints_arm.S | 257 push {r0, r4, r5, r9, r11, lr} @ spill regs 287 pop {r0, r4, r5, r9, r11, lr} @ restore spill regs [all...] |
/art/compiler/dex/ |
mir_graph.h | 297 * value is located (i.e. - physical register, frame, spill, etc.). For each SSA name (SReg)
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vreg_analysis.cc | 333 static const char* storage_name[] = {" Frame ", "PhysReg", " Spill "};
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/art/compiler/dex/quick/arm/ |
target_arm.cc | 583 * machinery is in place, always spill lr.
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/art/compiler/dex/quick/mips/ |
mips_lir.h | 68 * | spill region | {variable sized - will include lr if non-leaf.}
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/dalvik/vm/compiler/codegen/arm/Thumb/ |
Factory.cpp | 583 * and base and dest are the same, spill some other register to
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