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/prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
cfgloop.h | 648 /* The cost for register when we need to spill. */
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/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
cfgloop.h | 648 /* The cost for register when we need to spill. */
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/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
cfgloop.h | 648 /* The cost for register when we need to spill. */
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/prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/decimaltestdata/ |
remainderNear.decTest | 189 -- with spill...
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/prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/decimaltestdata/ |
remainderNear.decTest | 189 -- with spill...
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/external/llvm/docs/ |
CodeGenerator.rst | 135 target. This phase introduces spill code and eliminates all virtual register 140 LLVM alloca's and spill slots), the prolog and epilog code for the function 146 machine code can go here, such as spill code scheduling and peephole 300 entry to the first location where function data (local variables, spill [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_fs.cpp | 1027 * allocate and spill (due to contiguousness requirements for some [all...] |
/external/llvm/lib/CodeGen/ |
MachineVerifier.cpp | [all...] |
TargetLoweringBase.cpp | 851 // Find the first legal register class with the largest spill size. 855 // We want the largest possible spill size. [all...] |
MachineFunction.cpp | 508 /// represents a spill slot, returning a nonnegative identifier to represent [all...] |
Passes.cpp | 554 // which merges spill slots.
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/external/llvm/lib/Target/X86/ |
README-SSE.txt | 299 The basic idea is that a reload from a spill slot, can, if only one 4-byte 524 At that point we don't know, whether there will be vector spill, or not.
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_fs.cpp | 1027 * allocate and spill (due to contiguousness requirements for some [all...] |
/external/v8/src/arm/ |
lithium-arm.cc | 506 // spill slots. [all...] |
/external/v8/src/ia32/ |
lithium-ia32.cc | 501 // spill slots. [all...] |
/external/v8/src/mips/ |
lithium-mips.cc | 506 // spill slots. [all...] |
/external/v8/src/x64/ |
lithium-x64.cc | 499 // spill slots. [all...] |
/art/compiler/dex/quick/arm/ |
arm_lir.h | 75 * | spill region | {variable sized - will include lr if non-leaf.}
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utility_arm.cc | 995 // TODO: In future, may need to differentiate Dalvik & spill accesses
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/dalvik/vm/compiler/codegen/x86/ |
Lower.h | 38 /*! remove redundant spill of virtual registers */ [all...] |
/external/chromium_org/third_party/WebKit/Source/core/rendering/ |
RenderBlockLineLayout.cpp | 703 // In particular with RTL blocks, wide lines should still spill out to the left. 718 // Wide lines spill out of the block based off direction. [all...] |
/external/chromium_org/third_party/skia/src/opts/ |
SkBitmapProcState_matrix_clamp_neon.h | 775 * -- we spill a constant that could be easily regnerated
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/external/chromium_org/third_party/sqlite/src/src/ |
pcache1.c | 346 ** for all page cache needs and we should not need to spill the
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/external/chromium_org/v8/src/ |
flag-definitions.h | 711 "report heap spill statistics along with heap_stats [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.cpp | 93 // + We can't create a spill slot and use normal STR/LDR because stack
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