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  /external/chromium_org/tools/gyp/test/assembly/src/
lib1.S 12 #else /* Android (assuming ARM) */
  /external/clang/test/CodeGen/
arm-asm.c 1 // REQUIRES: arm-registered-target
arm-clear.c 1 // REQUIRES: arm-registered-target
arm-inline-asm.c 1 // REQUIRES: arm-registered-target
  /external/clang/test/CodeGenCXX/
fp16-overload.cpp 1 // RUN: %clang_cc1 -emit-llvm -o - -triple arm-none-linux-gnueabi %s | FileCheck %s
  /external/clang/test/Sema/
align-arm-apcs.c 1 // RUN: %clang_cc1 -triple arm-unknown-unknown -target-abi apcs-gnu -fsyntax-only -verify %s
  /external/clang/test/SemaCXX/
builtins-arm.cpp 3 // va_list on ARM AAPCS is struct { void* __ap }.
  /external/compiler-rt/lib/arm/
softfloat-alias.list 3 # aliased to the *vfp functions on arm processors
  /external/kernel-headers/original/asm-arm/
hardware.h 2 * linux/include/asm-arm/hardware.h
  /external/llvm/test/Bitcode/
arm32_neon_vcnt_upgrade.ll 7 %tmp2 = call <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16> %tmp1)
15 %tmp2 = call <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8> %tmp1)
20 declare <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16>) nounwind readnone
21 declare <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8>) nounwind readnone
  /external/llvm/test/CodeGen/AArch64/
neon-saturating-add-sub.ll 3 declare <8 x i8> @llvm.arm.neon.vqaddu.v8i8(<8 x i8>, <8 x i8>)
4 declare <8 x i8> @llvm.arm.neon.vqadds.v8i8(<8 x i8>, <8 x i8>)
8 %tmp1 = call <8 x i8> @llvm.arm.neon.vqaddu.v8i8(<8 x i8> %lhs, <8 x i8> %rhs)
15 %tmp1 = call <8 x i8> @llvm.arm.neon.vqadds.v8i8(<8 x i8> %lhs, <8 x i8> %rhs)
20 declare <16 x i8> @llvm.arm.neon.vqaddu.v16i8(<16 x i8>, <16 x i8>)
21 declare <16 x i8> @llvm.arm.neon.vqadds.v16i8(<16 x i8>, <16 x i8>)
25 %tmp1 = call <16 x i8> @llvm.arm.neon.vqaddu.v16i8(<16 x i8> %lhs, <16 x i8> %rhs)
32 %tmp1 = call <16 x i8> @llvm.arm.neon.vqadds.v16i8(<16 x i8> %lhs, <16 x i8> %rhs)
37 declare <4 x i16> @llvm.arm.neon.vqaddu.v4i16(<4 x i16>, <4 x i16>)
38 declare <4 x i16> @llvm.arm.neon.vqadds.v4i16(<4 x i16>, <4 x i16>
    [all...]
  /external/llvm/test/CodeGen/ARM/
2009-04-08-FREM.ll 1 ; RUN: llc < %s -march=arm
2009-07-09-asm-p-constraint.ll 1 ; RUN: llc < %s -march=arm -mattr=+v6
2010-04-13-v2f64SplitArg.ll 1 ; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8
2012-09-18-ARMv4ISelBug.ll 1 ; RUN: llc < %s -march=arm -mcpu=arm7tdmi | FileCheck %s
arguments-nosplit-double.ll 1 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
arguments-nosplit-i64.ll 1 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
arm-asm.ll 1 ; RUN: llc < %s -march=arm
fabss.ll 1 ; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
2 ; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+neon | FileCheck %s -check-prefix=NFP0
3 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
4 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
fast-isel-indirectbr.ll 1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
7 ; ARM: t1
16 ; ARM: bx r0
fdivs.ll 1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
fpow.ll 1 ; RUN: llc < %s -march=arm
ifcvt9.ll 1 ; RUN: llc < %s -march=arm
ispositive.ll 1 ; RUN: llc < %s -march=arm | FileCheck %s
neon_arith1.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | grep vadd

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