| /prebuilts/ndk/9/platforms/android-4/arch-arm/usr/include/asm/ |
| div64.h | 25 #define do_div(n,base) ({ register unsigned int __base asm("r4") = base; register unsigned long long __n asm("r0") = n; register unsigned long long __res asm("r2"); register unsigned int __rem asm(__xh); asm( __asmeq("%0", __xh) __asmeq("%1", "r2") __asmeq("%2", "r0") __asmeq("%3", "r4") "bl __do_div64" : "=r" (__rem), "=r" (__res) : "r" (__n), "r" (__base) : "ip", "lr", "cc"); n = __res; __rem; }) macro
|
| /prebuilts/ndk/9/platforms/android-5/arch-arm/usr/include/asm/ |
| div64.h | 25 #define do_div(n,base) ({ register unsigned int __base asm("r4") = base; register unsigned long long __n asm("r0") = n; register unsigned long long __res asm("r2"); register unsigned int __rem asm(__xh); asm( __asmeq("%0", __xh) __asmeq("%1", "r2") __asmeq("%2", "r0") __asmeq("%3", "r4") "bl __do_div64" : "=r" (__rem), "=r" (__res) : "r" (__n), "r" (__base) : "ip", "lr", "cc"); n = __res; __rem; }) macro
|
| /prebuilts/ndk/9/platforms/android-8/arch-arm/usr/include/asm/ |
| div64.h | 25 #define do_div(n,base) ({ register unsigned int __base asm("r4") = base; register unsigned long long __n asm("r0") = n; register unsigned long long __res asm("r2"); register unsigned int __rem asm(__xh); asm( __asmeq("%0", __xh) __asmeq("%1", "r2") __asmeq("%2", "r0") __asmeq("%3", "r4") "bl __do_div64" : "=r" (__rem), "=r" (__res) : "r" (__n), "r" (__base) : "ip", "lr", "cc"); n = __res; __rem; }) macro
|
| /prebuilts/ndk/9/platforms/android-9/arch-arm/usr/include/asm/ |
| div64.h | 25 #define do_div(n,base) ({ register unsigned int __base asm("r4") = base; register unsigned long long __n asm("r0") = n; register unsigned long long __res asm("r2"); register unsigned int __rem asm(__xh); asm( __asmeq("%0", __xh) __asmeq("%1", "r2") __asmeq("%2", "r0") __asmeq("%3", "r4") "bl __do_div64" : "=r" (__rem), "=r" (__res) : "r" (__n), "r" (__base) : "ip", "lr", "cc"); n = __res; __rem; }) macro
|
| /external/kernel-headers/original/asm-mips/ |
| div64.h | 59 #define do_div(n, base) ({ \ macro
93 #define do_div(n, base) ({ \ macro
|
| /bionic/libc/kernel/arch-arm/asm/ |
| div64.h | 31 #define do_div(n,base) ({ register unsigned int __base asm("r4") = base; register unsigned long long __n asm("r0") = n; register unsigned long long __res asm("r2"); register unsigned int __rem asm(__xh); asm( __asmeq("%0", __xh) __asmeq("%1", "r2") __asmeq("%2", "r0") __asmeq("%3", "r4") "bl __do_div64" : "=r" (__rem), "=r" (__res) : "r" (__n), "r" (__base) : "ip", "lr", "cc"); n = __res; __rem; }) macro
|
| /bionic/libc/kernel/arch-x86/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /development/ndk/platforms/android-9/arch-x86/include/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /prebuilts/ndk/8/platforms/android-14/arch-x86/usr/include/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /prebuilts/ndk/8/platforms/android-9/arch-x86/usr/include/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /prebuilts/ndk/9/platforms/android-14/arch-x86/usr/include/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /prebuilts/ndk/9/platforms/android-18/arch-x86/usr/include/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /prebuilts/ndk/9/platforms/android-9/arch-x86/usr/include/asm/ |
| div64.h | 22 #define do_div(n,base) ({ unsigned long __upper, __low, __high, __mod, __base; __base = (base); asm("":"=a" (__low), "=d" (__high):"A" (n)); __upper = __high; if (__high) { __upper = __high % (__base); __high = __high / (__base); } asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); asm("":"=A" (n):"a" (__low),"d" (__high)); __mod; }) macro
|
| /bionic/libc/kernel/arch-mips/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| div64.h | 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) macro
30 #define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) macro
|
| /external/kernel-headers/original/linux/ |
| jiffies.h | 389 do_div(tmp, (NSEC_PER_SEC / USER_HZ));
409 do_div(jif, USER_HZ);
417 do_div(x, HZ / USER_HZ);
425 do_div(x, (NSEC_PER_SEC / USER_HZ));
433 do_div(x, (NSEC_PER_SEC / USER_HZ));
436 do_div(x, (NSEC_PER_SEC / 512));
444 do_div(x, (unsigned long)((9ull * NSEC_PER_SEC + (USER_HZ/2))
|
| blkdev.h | 826 # define sector_div(a, b) do_div(a, b)
|
| /external/chromium_org/third_party/freetype/src/truetype/ |
| ttinterp.c | [all...] |
| /external/freetype/src/truetype/ |
| ttinterp.c | [all...] |
| /prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.6/lib/ |
| libmipsel-unknown-linux-android-sim.a | 391
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?Ncb_host_to_target_errno cb_target_to_host_open default_callback cb_read_target_syscall_maps cb_target_to_host_syscall cb_store_target_endian cb_host_to_target_stat sim_cb_printf sim_cb_eprintf cb_is_stdin cb_is_stdout cb_is_stderr simulator_sysroot cb_syscall cb_init_syscall_map cb_init_errno_map cb_init_open_map version semantic_illegal delayslot32 nullify_next_insn32 loadstore_ea not_word_value unpredictable check_mf_cycles check_mt_hilo check_mf_hilo check_mult_hilo check_div_hilo check_u64 do_addiu do_addu do_and do_daddiu do_daddu do_ddiv do_ddivu do_div do_divu do_dmultx do_dmult do_dmultu do_dror do_dsll do_dsllv do_dsra do_dsrav do_dsrl do_dsrlv do_dsubu do_load do_load_left do_load_right do_mfhi do_mflo do_mult do_multu do_nor do_or do_ori do_ror do_store do_store_left do_store_right do_sll do_sllv do_slt do_slti do_sltiu do_sltu do_sra do_srav do_srl do_srlv do_subu do_xor do_xori str_FMT str_TF str_ND str_COND check_fmt_p check_fpu delayslot16 basepc do_save str_MFHI str_SAT str_UNS do_vr_mul_op do_ph_op do_w_op do_qb_op do_qb_shift do_ph_shift do_w_shll do_w_shra do_qb_muleu do_ph_mulq do_ph_muleq do_qb_dot_product do_ph_dot_product do_w_dot_product do_ph_maq do_qb_cmpu do_qb_cmpgu do_ph_cmpu do_w_extr do_h_extr do_extp do_shilo do_u_ph_op do_uh_qb_op do_qb_cmpgdu do_w_ph_dot_product do_w_mulq do_precr_sra do_qb_shra do_ph_shrl do_qh_ph_op do_qh_w_op do_x_w_ph_dot_product do_qx_w_ph_dot_product itable_flag_names itable_option_names itable_processor_names itable semantic_RSVD_SPECIAL semantic_SYSCALL_SPECIAL semantic_BREAK_SPECIAL semantic_TGE_SPECIAL semantic_TGEU_SPECIAL semantic_TLT_SPECIAL semantic_TLTU_SPECIAL semantic_TEQ_SPECIAL semantic_TNE_SPECIAL semantic_SLLV_SPECIAL semantic_SRLV_SPECIAL semantic_SRAV_SPECIAL semantic_MOVZ_SPECIAL semantic_MOVN_SPECIAL semantic_ADD_SPECIAL semantic_ADDU_SPECIAL semantic_SUB_SPECIAL semantic_SUBU_SPECIAL semantic_AND_SPECIAL semantic_OR_SPECIAL semantic_XOR_SPECIAL semantic_NOR_SPECIAL semantic_SLT_SPECIAL semantic_SLTU_SPECIAL semantic_MULT_SPECIAL semantic_MULTU_SPECIAL semantic_DIV_SPECIAL semantic_DIVU_SPECIAL semantic_MOVtf_SPECIAL semantic_JALR_SPECIAL semantic_JR_SPECIAL semantic_MTHI_SPECIAL semantic_MTLO_SPECIAL semantic_SLLa_SPECIAL semantic_SRL_SPECIAL semantic_SRA_SPECIAL semantic_MFHI_SPECIAL semantic_MFLO_SPECIAL semantic_SYNC_SPECIAL semantic_BLTZ_REGIMM semantic_BGEZ_REGIMM semantic_BLTZL_REGIMM semantic_BGEZL_REGIMM semantic_TGEI_REGIMM semantic_TGEIU_REGIMM semantic_TLTI_REGIMM semantic_TLTIU_REGIMM semantic_TEQI_REGIMM semantic_TNEI_REGIMM semantic_BLTZAL_REGIMM semantic_BGEZAL_REGIMM semantic_BLTZALL_REGIMM semantic_BGEZALL_REGIMM semantic_J_NORMAL semantic_JAL_NORMAL semantic_BEQ_NORMAL semantic_BNE_NORMAL semantic_BLEZ_NORMAL semantic_BGTZ_NORMAL semantic_ADDI_NORMAL semantic_ADDIU_NORMAL semantic_SLTI_NORMAL semantic_SLTIU_NORMAL semantic_ANDI_NORMAL semantic_ORI_NORMAL semantic_XORI_NORMAL semantic_LUI_NORMAL semantic_COPz_NORMAL semantic_MFC0_COP0 semantic_MTC0_COP0 semantic_BC0F_COP0 semantic_BC0T_COP0 semantic_BC0FL_COP0 semantic_BC0TL_COP0 semantic_TLBR_COP0 semantic_TLBWI_COP0 semantic_TLBWR_COP0 semantic_TLBP_COP0 semantic_RFE_COP0 semantic_ERET_COP0 semantic_MFC1b_COP1 semantic_CFC1b_COP1 semantic_MTC1b_COP1 semantic_CTC1b_COP1 semantic_BC1b_COP1S semantic_ADD_fmt_COP1 semantic_SUB_fmt_COP1 semantic_MUL_fmt_COP1 semantic_DIV_fmt_COP1 semantic_MOVZ_fmt_COP1 semantic_MOVN_fmt_COP1 semantic_C_cond_fmtb_COP1 semantic_MOVtf_fmt_COP1 semantic_SQRT_fmt_COP1 semantic_ABS_fmt_COP1 semantic_MOV_fmt_COP1 semantic_NEG_fmt_COP1 semantic_ROUND_L_fmt_COP1 semantic_TRUNC_L_fmt_COP1 semantic_CEIL_L_fmt_COP1 semantic_FLOOR_L_fmt_COP1 semantic_ROUND_W_fmt_COP1 semantic_TRUNC_W_COP1 semantic_CEIL_W_COP1 semantic_FLOOR_W_fmt_COP1 semantic_RECIP_fmt_COP1 semantic_RSQRT_fmt_COP1 semantic_CVT_S_fmt_COP1 semantic_CVT_D_fmt_COP1 semantic_CVT_W_fmt_COP1 semantic_CVT_L_fmt_COP1 semantic_MADD_fmt_COP1X semantic_MSUB_fmt_COP1X semantic_NMADD_fmt_COP1X semantic_NMSUB_fmt_COP1X semantic_SWXC1_COP1X semantic_PREFX_COP1X semantic_LWXC1_COP1X semantic_BEQL_NORMAL semantic_BNEL_NORMAL semantic_BLEZL_NORMAL semantic_BGTZL_NORMAL semantic_LB_NORMAL semantic_LH_NORMAL semantic_LWL_NORMAL semantic_LW_NORMAL semantic_LBU_NORMAL semantic_LHU_NORMAL semantic_LWR_NORMAL semantic_SB_NORMAL semantic_SH_NORMAL semantic_SWL_NORMAL semantic_SW_NORMAL semantic_SWR_NORMAL semantic_CACHE_NORMAL semantic_LWCz_NORMAL semantic_LL_NORMAL semantic_LWC1_COP1 semantic_PREF_NORMAL semantic_LDC1b_COP1 semantic_SWCz_NORMAL semantic_SC_NORMAL semantic_SWC1_COP1 semantic_SDC1b_COP1 idecode_issue engine_run sim_engine_run sim_addr_range_hit_p sim_addr_range_add sim_addr_range_delete current_host_byte_order current_target_byte_order current_stdio current_alignment current_floating_point sim_config_default sim_config print_sim_config sim_core_install sim_core_signal sim_core_attach sim_core_detach sim_core_read_buffer sim_core_write_buffer sim_core_set_xor sim_core_xor_read_buffer sim_core_xor_write_buffer sim_core_trans_addr sim_core_read_aligned_16 sim_core_read_unaligned_16 sim_core_write_aligned_16 sim_core_write_unaligned_16 sim_core_read_aligned_8 sim_core_read_unaligned_8 sim_core_write_aligned_8 sim_core_write_unaligned_8 sim_core_read_misaligned_7 sim_core_write_misaligned_7 sim_core_read_misaligned_6 sim_core_write_misaligned_6 sim_core_read_misaligned_5 sim_core_write_misaligned_5 sim_core_read_aligned_4 sim_core_read_unaligned_4 sim_core_write_aligned_4 sim_core_write_unaligned_4 sim_core_read_misaligned_3 sim_core_write_misaligned_3 sim_core_read_aligned_2 sim_core_read_unaligned_2 sim_core_write_aligned_2 sim_core_write_unaligned_2 sim_core_read_aligned_1 sim_core_write_aligned_1 sim_events_schedule sim_events_install sim_events_time sim_events_elapsed_time sim_events_remain_time sim_events_schedule_vtracef sim_events_schedule_tracef sim_events_schedule_after_signal sim_events_watch_clock sim_events_watch_sim sim_events_watch_core sim_events_deschedule sim_events_tick sim_events_tickn sim_events_slip sim_events_preprocess sim_events_process sim_fpu_is_zero sim_fpu_is_snan sim_fpu_is_qnan sim_fpu_is_infinity sim_fpu_is_nan sim_fpu_32to sim_fpu_232to sim_fpu_64to sim_fpu_to32 sim_fpu_to232 sim_fpu_to64 sim_fpu_fractionto sim_fpu_tofraction sim_fpu_round_32 sim_fpu_round_64 sim_fpu_add sim_fpu_sub sim_fpu_mul sim_fpu_div sim_fpu_max sim_fpu_min sim_fpu_neg sim_fpu_abs sim_fpu_inv sim_fpu_one sim_fpu_sqrt sim_fpu_i32to sim_fpu_u32to sim_fpu_i64to sim_fpu_u64to sim_fpu_to32i sim_fpu_to32u sim_fpu_to64i sim_fpu_to64u sim_fpu_2d sim_fpu_d2 sim_fpu_is_number sim_fpu_is_denorm sim_fpu_sign sim_fpu_exp sim_fpu_fraction sim_fpu_guard sim_fpu_is sim_fpu_cmp sim_fpu_is_lt sim_fpu_lt sim_fpu_is_le sim_fpu_le sim_fpu_is_eq sim_fpu_eq sim_fpu_is_ne sim_fpu_ne sim_fpu_is_ge sim_fpu_ge sim_fpu_is_gt sim_fpu_gt sim_fpu_zero sim_fpu_qnan sim_fpu_two sim_fpu_max32 sim_fpu_max64 sim_fpu_print_fpu sim_fpu_printn_fpu sim_fpu_print_status sim_io_init sim_io_shutdown sim_io_unlink sim_io_time sim_io_system sim_io_rename sim_io_write_stdout sim_io_error sim_io_flush_stdout sim_io_write_stderr sim_io_flush_stderr sim_io_write sim_io_read_stdin sim_io_read sim_io_open sim_io_lseek sim_io_isatty sim_io_get_errno sim_io_close sim_io_printf sim_io_vprintf sim_io_eprintf sim_io_evprintf sim_io_poll_quit sim_io_poll_read sim_io_stat sim_io_fstat sim_info sim_load_file sim_memopt_install sim_pre_argv_init sim_module_install sim_post_argv_init sim_module_init sim_module_uninstall sim_module_resume sim_module_suspend sim_module_info sim_module_add_init_fn sim_module_add_resume_fn sim_module_add_suspend_fn sim_module_add_uninstall_fn sim_module_add_info_fn sim_add_option_table sim_print_help standard_install sim_parse_args sim_args_command set_profile_option_mask sim_profile_set_option sim_profile_print_bar profile_install sim_signal_to_host sim_signal_to_target trace_install trace_printf trace_prefix trace_generic trace_vprintf trace_input0 trace_input_word1 trace_input_word2 trace_input_word3 trace_input_word4 trace_input_bool1 trace_input_addr1 trace_input_fp1 trace_input_fp2 trace_input_fp3 trace_input_fpu1 trace_input_fpu2 trace_input_fpu3 trace_result_word1 trace_result0 trace_result_word2 trace_result_word4 trace_result_bool1 trace_result_addr1 trace_result_fp1 trace_result_fp2 trace_result_fpu1 trace_result_string1 trace_result_word1_string1 trace_one_insn debug_printf current_state zalloc sim_state_alloc sim_state_free sim_cpu_lookup sim_cpu_msg_prefix sim_io_eprintf_cpu sim_add_commas sim_analyze_program sim_elapsed_time_get sim_elapsed_time_since sim_do_commandf map_to_str access_to_str transfer_to_str sim_watchpoint_install value_fpr store_fpr test_fcsr value_fcr store_fcr update_fcsr fp_cmp fp_abs fp_neg fp_add fp_sub fp_mul fp_div fp_recip fp_sqrt fp_rsqrt fp_madd fp_msub fp_nmadd fp_nmsub fp_add_r fp_mul_r fp_recip1 fp_recip2 fp_rsqrt1 fp_rsqrt2 convert ps_lower ps_upper pack_ps convert_ps tracefh interrupt_pending interrupt_event signal_exception sim_open sim_do_command sim_write sim_close sim_read sim_store_register sim_fetch_register sim_create_inferior sim_monitor mips_core_signal dotrace pr_addr mips_cpu_exception_trigger unpredictable_action cop_lw cop_ld cop_sw cop_sd decode_coproc pr_uword64 mips_cpu_exception_suspend mips_cpu_exception_resume mdmx_cpr_op mdmx_cc_op mdmx_pick_op mdmx_acc_op mdmx_rac_op mdmx_wacl mdmx_wach mdmx_round_op mdmx_shuffle DSPLO_REGNUM DSPHI_REGNUM address_translation prefetch load_memory store_memory ifetch32 ifetch16 sync_operation cache_op pending_tick sim_load sim_engine_get_run_state sim_engine_set_run_state sim_engine_halt sim_engine_restart sim_engine_vabort sim_engine_abort sim_engine_last_cpu_nr sim_engine_next_cpu_nr sim_engine_nr_cpus sim_engine_install sim_stop sim_resume sim_stop_reason callback.o/ 1346986716 1249825000 100640 12100 `
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