HomeSort by relevance Sort by last modified time
    Searched full:immediate (Results 226 - 250 of 1964) sorted by null

1 2 3 4 5 6 7 8 91011>>

  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/
yasm_arch.xml 211 <para>For most instructions in 64-bit mode, immediate values
214 is the mov instruction, which can take a 64-bit immediate when
232 <para>The handling of mov reg64, unsized immediate is different
236 <screen>add rax, 0xffffffff ; sign-extended 32-bit immediate</screen>
239 <screen>add rax, sym ; sign-extended 32-bit immediate</screen>
240 <screen>mov eax, 1 ; 5 byte (32-bit immediate)</screen>
241 <screen>mov rax, 1 ; 10 byte (64-bit immediate)</screen>
245 <screen>mov ecx, sym ; 5 byte (32-bit immediate)</screen>
247 <screen>mov rcx, qword sym ; 10 byte (64-bit immediate)</screen>
  /external/chromium_org/third_party/yasm/source/patched-yasm/
yasm_arch.7 214 For most instructions in 64\-bit mode, immediate values remain 32 bits; their value is sign\-extended into the upper 32 bits of the target register prior to being used\&. The exception is the mov instruction, which can take a 64\-bit immediate when the destination is a 64\-bit register\&. Examples in NASM syntax:
346 The handling of mov reg64, unsized immediate is different between YASM and NASM 2\&.x; YASM follows the above behavior, while NASM 2\&.x does the following:
352 add rax, 0xffffffff ; sign\-extended 32\-bit immediate
382 add rax, sym ; sign\-extended 32\-bit immediate
392 mov eax, 1 ; 5 byte (32\-bit immediate)
402 mov rax, 1 ; 10 byte (64\-bit immediate)
442 mov ecx, sym ; 5 byte (32\-bit immediate)
462 mov rcx, qword sym ; 10 byte (64\-bit immediate)
  /external/chromium_org/v8/test/mjsunit/regress/
regress-2250.js 33 // immediate deopt. Another problem here is that no matter how many time we
  /external/kernel-headers/original/linux/
backing-dev.h 41 * - These flags let !MMU mmap() govern direct device mapping vs immediate
icmp.h 55 #define NR_ICMP_UNREACH 15 /* instead of hardcoding immediate value */
  /external/llvm/lib/Target/ARM/
ARMScheduleV6.td 99 // Immediate offset
113 // Immediate offset with update
152 // Immediate offset
166 // Immediate offset with update
Thumb1RegisterInfo.h 37 /// specified immediate.
Thumb2RegisterInfo.cpp 32 /// specified immediate.
  /external/llvm/lib/Target/Mips/
MicroMipsInstrInfo.td 2 /// Arithmetic Instructions (ALU Immediate)
  /external/llvm/lib/Target/PowerPC/
PPCInstrBuilder.h 15 // (Operand), Dest Reg, Base Reg, and either Reg Index or Immediate
  /external/llvm/lib/Target/X86/Disassembler/
X86DisassemblerDecoderCommon.h 332 ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \
344 ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \
345 ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \
364 ENUM_ENTRY(TYPE_REL8, "1-byte immediate address") \
375 ENUM_ENTRY(TYPE_IMM8, "1-byte immediate operand") \
379 ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \
380 ENUM_ENTRY(TYPE_IMM5, "1-byte immediate operand between 0 and 31") \
433 ENUM_ENTRY(TYPE_IMMv, "Immediate operand of operand size") \
434 ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \
  /external/llvm/test/CodeGen/ARM/
lsr-icmp-imm.ll 5 ; In this case, the immediate value is -2 which requires a cmn instruction.
  /external/llvm/test/CodeGen/X86/
x86-64-and-mask.ll 6 ; This should be a single mov, not a load of immediate + andq.
  /external/llvm/test/MC/AArch64/
neon-mov.s 7 // Vector Move Immediate Shifted
38 // Vector Move Inverted Immediate Shifted
69 // Vector Bitwise Bit Clear (AND NOT) - immediate
131 // Vector Move Immediate Masked
144 // Vector Move Inverted Immediate Masked
157 // Vector Immediate - per byte
170 // Vector Move Immediate - bytemask, per doubleword
177 // Vector Move Immediate - bytemask, one doubleword
184 // Vector Floating Point Move Immediate
  /external/mesa3d/src/gallium/auxiliary/tgsi/
tgsi_parse.h 79 struct tgsi_immediate Immediate;
  /external/skia/include/lazy/
SkBitmapFactory.h 62 * handle the pixel memory. Otherwise installPixelRef will do an immediate decode.
  /external/valgrind/main/VEX/priv/
host_mips_defs.h 183 Mam_IR, /* Immediate (signed 16-bit) + Reg */
211 /* ("RH" == "Register or Halfword immediate") */
318 Bool /* is the 2nd operand an immediate? */ );
328 Bool /* is the 2nd operand an immediate? */ ,
342 Min_LI, /* load word (32/64-bit) immediate (fake insn) */
424 - For add, the immediate, if it exists, is a signed 16.
425 - For sub, the immediate, if it exists, is a signed 16
429 - For and/or/xor, the immediate, if it exists,
439 Limitations: the immediate, if it exists,
  /external/valgrind/main/memcheck/tests/
partiallydefinedeq.c 70 // or with the extended immediate facility in an instruction (2 errors).
  /hardware/samsung_slsi/exynos5/mobicore/
README.android 23 Makes the daemon run in background and returns immediate control to the shell. No need to use shell forking with &
  /packages/apps/Dialer/src/com/android/dialer/util/
AsyncTaskExecutor.java 29 * One immediate benefit of this approach is that testing becomes much easier, since it is easy to
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/bits/
dlfcn.h 26 #define RTLD_NOW 0x00002 /* Immediate function call binding. */
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/
icmp.h 55 #define NR_ICMP_UNREACH 15 /* instead of hardcoding immediate value */
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/bits/
dlfcn.h 26 #define RTLD_NOW 0x00002 /* Immediate function call binding. */
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/
icmp.h 55 #define NR_ICMP_UNREACH 15 /* instead of hardcoding immediate value */
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/bits/
dlfcn.h 26 #define RTLD_NOW 0x00002 /* Immediate function call binding. */

Completed in 487 milliseconds

1 2 3 4 5 6 7 8 91011>>