| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86ATTInstPrinter.h | 25 X86ATTInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
27 : MCInstPrinter(MAI, MII, MRI) {}
|
| X86IntelInstPrinter.h | 26 X86IntelInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
28 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/llvm/lib/Target/XCore/MCTargetDesc/ |
| XCoreMCTargetDesc.cpp | 79 const MCInstrInfo &MII,
82 return new XCoreInstPrinter(MAI, MII, MRI);
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCTargetDesc.cpp | 67 const MCInstrInfo &MII,
70 return new AMDGPUInstPrinter(MAI, MII, MRI);
|
| /external/clang/lib/Frontend/ |
| FrontendOptions.cpp | 24 .Case("mii", IK_PreprocessedObjCXX)
|
| /external/clang/include/clang/Driver/ |
| Types.def | 51 TYPE("objective-c++-cpp-output", PP_ObjCXX, INVALID, "mii", "u")
52 TYPE("objc++-cpp-output", PP_ObjCXX_Alias, INVALID, "mii", "u")
63 TYPE("objective-c++-header-cpp-output", PP_ObjCXXHeader, INVALID, "mii", "p")
|
| /external/grub/netboot/ |
| epic100.h | 26 MMCTL = 0x30, /* MII Management Interface Control */
27 MMDATA = 0x34, /* MII Management Interface Data */
28 MIICFG = 0x38, /* MII Configuration */
|
| tulip.c | 80 patch to tulip.c that implements the automatic selection of the MII
87 Added simple MII support. Re-arranged code to better modularize
91 PNIC2 cards. No MII support, but single interface (RJ45) tulip
153 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
154 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
155 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19"
[all...] |
| epic100.c | 82 static signed char phys[4]; /* MII device addresses. */
130 mmctl = ioaddr + MMCTL; /* MII Management Interface Control */
131 mmdata = ioaddr + MMDATA; /* MII Management Interface Data */
184 /* Find the connected MII xcvrs. */
191 printf("MII transceiver found at address %d.\n", phy);
197 printf("***WARNING***: No MII transceiver found!\n");
|
| w89c840.c | 253 /* MII transceiver section. */
254 int mii_cnt; /* MII device addresses. */
256 unsigned char phys[2]; /* MII device addresses. */
677 printf("winbond-840 : MII PHY found at address %d, status "
687 printf("winbond-840 : MII PHY not found -- this device may not operate correctly.\n");
702 /* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. These are
756 /* MII transceiver control section.
757 Read and write the MII registers using software-generated serial
758 MDIO protocol. See the MII specifications or DP83840A data sheet
765 /* Set iff a MII transceiver on any interface requires mdio preamble
[all...] |
| 3c90x.txt | 93 you want to use (i.e., 10/100 rj45, AUI, coax, MII).
152 unless the card is set internally to the MII transceiver, it will only
156 MII transceivers, and even the .lzrom image ends up being just a little
162 configuration to use MII when it boots. The 3c905b driver does this
185 6 MII
187 9 MII External MAC Mode
202 up in MII mode, and the driver checks the LanWorks register to find
213 setting MII mode on bootup. Linux 2.0.35 does not have this problem.
|
| /external/kernel-headers/original/linux/ |
| sockios.h | 81 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */
82 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */
83 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
| sockios.h | 80 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */
81 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */
82 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| sockios.h | 80 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */
81 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */
82 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| sockios.h | 80 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */
81 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */
82 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
|
| /frameworks/base/media/tests/MediaFrameworkTest/src/com/android/mediaframeworktest/functional/videoeditor/ |
| MediaPropertiesTest.java | 121 int width, int height, MediaImageItem mii)
123 assertEquals("Aspect Ratio Mismatch", aspectRatio, mii.getAspectRatio());
124 assertEquals("File Type Mismatch", fileType, mii.getFileType());
125 assertEquals("Image height " + mii.getHeight(), height, mii.getHeight());
126 assertEquals("Image width " + mii.getWidth(), width, mii.getWidth());
589 final MediaImageItem mii = mVideoEditorHelper.createMediaItem local
592 validateImageProperties(aspectRatio, fileType, width, height, mii);
607 final MediaImageItem mii = mVideoEditorHelper.createMediaIte local
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600Packetizer.cpp | 174 MachineInstr *MII = SUI->getInstr(), *MIJ = SUJ->getInstr();
175 if (getSlot(MII) <= getSlot(MIJ) && !TII->isTransOnly(MII))
177 // Does MII and MIJ share the same pred_sel ?
178 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel),
180 unsigned PredI = (OpI > -1)?MII->getOperand(OpI).getReg():0,
192 if (MII->getOperand(0).getReg() != MIJ->getOperand(0).getReg())
|
| R600OptimizeVectorRegisters.cpp | 322 for (MachineBasicBlock::iterator MII = MB->begin(), MIIE = MB->end();
323 MII != MIIE; ++MII) {
324 MachineInstr *MI = MII;
354 MII = RebuildVector(&RSI, &CandidateRSI, RemapChan);
362 MII = RebuildVector(&RSI, &CandidateRSI, RemapChan);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCFGOptimizer.cpp | 110 MachineBasicBlock::iterator MII = MBB->getFirstTerminator();
111 if (MII != MBB->end()) {
112 MachineInstr *MI = MII;
|
| HexagonPeephole.cpp | 132 for (MachineBasicBlock::iterator MII = MBB->begin(); MII != MBB->end();
133 ++MII) {
134 MachineInstr *MI = MII;
|
| /external/llvm/lib/CodeGen/ |
| LLVMTargetMachine.cpp | 166 const MCInstrInfo &MII = *getInstrInfo();
174 MII, MRI, STI);
180 MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, *Context);
198 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, STI,
|
| PeepholeOptimizer.cpp | 509 MII = I->begin(), MIE = I->end(); MII != MIE; ) {
510 MachineInstr *MI = &*MII;
511 // We may be erasing MI below, increment MII now.
512 ++MII;
540 // and before the already incremented MII. Adjust MII so that the
542 MII = MI;
543 ++MII;
|
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.h | 27 NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 44 const char *x86DisassemblerGetInstrName(unsigned Opcode, const void *mii) {
45 const MCInstrInfo *MII = static_cast<const MCInstrInfo *>(mii);
46 return MII->getName(Opcode);
77 const MCInstrInfo *MII)
78 : MCDisassembler(STI), MII(MII), fMode(mode) {}
81 delete MII;
134 (const void*)MII,
|
| /external/chromium_org/ui/views/controls/menu/ |
| native_menu_win.h | 80 // |label| at the specified model_index, and adds string data to |mii| if
83 void UpdateMenuItemInfoForString(MENUITEMINFO* mii,
|
