/external/llvm/lib/Target/Mips/ |
Mips64InstrInfo.td | 105 def SLTu64 : SetCC_R<"sltu", setult, GPR64Opnd>, ADD_FM<0, 0x2b>;
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/external/v8/src/mips/ |
constants-mips.h | 335 SLTU = ((5 << 3) + 3),
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assembler-mips.cc | 1556 void Assembler::sltu(Register rd, Register rs, Register rt) { function in class:v8::Assembler [all...] |
assembler-mips.h | 776 void sltu(Register rd, Register rs, Register rt); [all...] |
macro-assembler-mips.h | 582 DEFINE_INSTRUCTION(Sltu); [all...] |
simulator-mips.cc | [all...] |
/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.h | 295 void SLTU(int Rd, int Rs, int Rt);
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mips_disassem.c | 85 /*40 */ "spec50","spec51","slt","sltu", "dadd","daddu","dsub","dsubu",
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/external/chromium_org/v8/src/mips/ |
assembler-mips.cc | 1563 void Assembler::sltu(Register rd, Register rs, Register rt) { function in class:v8::Assembler [all...] |
assembler-mips.h | 711 void sltu(Register rd, Register rs, Register rt); [all...] |
macro-assembler-mips.h | 591 DEFINE_INSTRUCTION(Sltu); [all...] |
simulator-mips.cc | [all...] |
/art/compiler/dex/quick/mips/ |
assemble_mips.cc | 276 "sltu", "!0r,!1r,!2r", 4), [all...] |
/art/compiler/utils/mips/ |
assembler_mips.cc | 314 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) { [all...] |
/external/chromium_org/v8/test/cctest/ |
test-assembler-mips.cc | 178 __ sltu(v0, t7, t3); [all...] |
/external/v8/test/cctest/ |
test-assembler-mips.cc | 188 __ sltu(v0, t7, t3); [all...] |
/dalvik/vm/mterp/out/ |
InterpAsm-mips.S | [all...] |
/external/valgrind/main/VEX/priv/ |
guest_mips_toIR.c | [all...] |
host_mips_defs.c | [all...] |
/prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.6/bin/ |
mipsel-linux-android-as | |
mipsel-linux-android-run | |
mipsel-linux-android-objdump | |
/prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.6/mipsel-linux-android/bin/ |
as | |
/dalvik/vm/compiler/codegen/mips/ |
Assemble.cpp | 272 "sltu", "!0r,!1r,!2r", 2), [all...] |
/external/qemu/ |
mips-dis.c | [all...] |