| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
| cdk.h | 44 #define CDK_SIGADDR 0x200
260 #define F_DSRIFLOW 0x200
271 #define FI_1MARKBREAK 0x200
290 #define FO_OTAB1 0x200
331 #define DT_RXEMPTY 0x200
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| cdk.h | 44 #define CDK_SIGADDR 0x200
260 #define F_DSRIFLOW 0x200
271 #define FI_1MARKBREAK 0x200
290 #define FO_OTAB1 0x200
331 #define DT_RXEMPTY 0x200
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| cdk.h | 44 #define CDK_SIGADDR 0x200
260 #define F_DSRIFLOW 0x200
271 #define FI_1MARKBREAK 0x200
290 #define FO_OTAB1 0x200
331 #define DT_RXEMPTY 0x200
|
| /external/chromium_org/ash/wm/workspace/ |
| workspace_window_resizer_unittest.cc | 221 EXPECT_EQ("500,200 100x200", window2_->bounds().ToString());
227 EXPECT_EQ("780,200 20x200", window2_->bounds().ToString());
232 EXPECT_EQ("500,200 100x200", window2_->bounds().ToString());
238 EXPECT_EQ("400,200 100x200", window2_->bounds().ToString());
255 EXPECT_EQ("300,200 200x200", window2_->bounds().ToString());
261 EXPECT_EQ("20,200 480x200", window2_->bounds().ToString());
266 EXPECT_EQ("500,200 100x200", window2_->bounds().ToString());
271 EXPECT_EQ("300,200 200x200", window2_->bounds().ToString());
293 EXPECT_EQ("400,300 150x200", window2_->bounds().ToString());
294 EXPECT_EQ("550,300 100x200", window3_->bounds().ToString())
[all...] |
| /development/ndk/platforms/android-3/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /external/chromium_org/ash/system/web_notification/ |
| web_notification_tray_unittest.cc | 265 UpdateDisplay("400x400,200x200");
280 UpdateDisplay("400x400,200x200");
285 UpdateDisplay("400x400,200x200");
|
| /external/qemu/block/ |
| vvfat.c | 323 unsigned char first_sectors[0x40*0x200];
587 s->sectors_per_fat * 0x200 * 3 / 2 - 1);
591 s->sectors_per_fat * 0x200 / s->fat.item_size - 1);
849 memset(&(s->first_sectors[0]),0,0x40*0x200);
851 s->cluster_size=s->sectors_per_cluster*0x200;
861 i = 1+s->sectors_per_cluster*0x200*8/s->fat_type;
958 bootsector=(bootsector_t*)(s->first_sectors+(s->first_sectors_number-1)*0x200);
963 bootsector->sector_size=cpu_to_le16(0x200);
[all...] |
| /prebuilts/ndk/4/platforms/android-3/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/4/platforms/android-4/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/4/platforms/android-5/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/4/platforms/android-8/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/5/platforms/android-3/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/6/platforms/android-3/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/6/platforms/android-3/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-14/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-3/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-3/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-4/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-4/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-5/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-5/arch-x86/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
| /prebuilts/ndk/7/platforms/android-8/arch-arm/usr/include/linux/ |
| pci_regs.h | 27 #define PCI_COMMAND_FAST_BACK 0x200
38 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
161 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
|
