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  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/asm/
auxvec.h 5 * for more of them, start the x86-specific ones at 32.
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/asm/
auxvec.h 5 * for more of them, start the x86-specific ones at 32.
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/lib/
libpthread.so 4 OUTPUT_FORMAT(elf64-x86-64)
  /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/lib/
crtbegin_dynamic.o 
crtbegin_static.o 
crtend_android.o 
  /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/lib/
crtbegin_dynamic.o 
crtbegin_static.o 
crtend_android.o 
  /device/generic/x86/
BoardConfig.mk 9 TARGET_ARCH := x86
10 TARGET_CPU_ABI := x86
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/
Makefile.inc 1 EXTRA_DIST += modules/arch/x86/Makefile.inc
4 include modules/arch/x86/Makefile.inc
  /external/kernel-headers/original/asm-x86/
auxvec.h 5 * for more of them, start the x86-specific ones at 32.
15 #else /* else it's non-compat x86-64 */
  /external/llvm/test/CodeGen/X86/
2008-08-17-UComiCodeGenBug.ll 5 tail call i32 @llvm.x86.sse.ucomige.ss( <4 x float> %a, <4 x float> %b ) nounwind readnone
9 declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
2008-09-05-sinttofp-2xi32.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | not grep unpcklpd
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | not grep unpckhpd
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1
24 %y = tail call <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx %x)
30 %y = tail call x86_mmx @llvm.x86.sse.cvttpd2pi (<2 x double> %x)
34 declare <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx)
35 declare x86_mmx @llvm.x86.sse.cvttpd2pi(<2 x double>)
2008-09-25-sseregparm-1.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2
2008-12-12-PrivateEHSymbol.ll 1 ; RUN: llc < %s -disable-cfi -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh
2 ; RUN: llc < %s -disable-cfi -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh
bitcast2.ll 1 ; RUN: llc < %s -march=x86-64 | grep movd | count 2
2 ; RUN: llc < %s -march=x86-64 | not grep rsp
compare_folding.ll 1 ; RUN: llc < %s -march=x86 -mcpu=yonah | \
3 ; RUN: llc < %s -march=x86 -mcpu=yonah | \
fast-cc-merge-stack-adj.ll 1 ; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | FileCheck %s
fildll.ll 1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
fmul-zero.ll 1 ; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps
2 ; RUN: llc < %s -march=x86-64 | grep mulps
h-registers-3.ll 1 ; RUN: llc < %s -march=x86 | grep mov | count 1
2 ; RUN: llc < %s -march=x86-64 | grep mov | count 1
mmx-shift.ll 1 ; RUN: llc < %s -march=x86 -mattr=+mmx | FileCheck %s
2 ; RUN: llc < %s -march=x86-64 -mattr=+mmx | FileCheck %s
7 %tmp6 = tail call x86_mmx @llvm.x86.mmx.pslli.q( x86_mmx %tmp, i32 32 ) ; <x86_mmx> [#uses=1]
15 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone
19 %tmp7 = tail call x86_mmx @llvm.x86.mmx.psra.d( x86_mmx %mm1, x86_mmx %mm2 ) nounwind readnone ; <x86_mmx> [#uses=1]
27 declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone
31 %tmp8 = tail call x86_mmx @llvm.x86.mmx.psrli.w( x86_mmx %mm1, i32 %bits ) nounwind readnone ; <x86_mmx> [#uses=1]
39 declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone
subreg-to-reg-0.ll 1 ; RUN: llc < %s -march=x86-64 | grep mov | count 1
4 ; x86-64's implicit zero-extension!
vec_shift3.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllq
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 2
7 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone ; <<2 x i64>> [#uses=1]
13 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; <<2 x i64>> [#uses=1]
20 %tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone ; <<8 x i16>> [#uses=1]
25 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone
26 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone

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