| /external/libvpx/libvpx/vp9/ |
| vp9cx.mk | 77 VP9_CX_SRCS-$(ARCH_X86)$(ARCH_X86_64) += encoder/x86/vp9_mcomp_x86.h
78 VP9_CX_SRCS-$(HAVE_MMX) += encoder/x86/vp9_variance_mmx.c
79 VP9_CX_SRCS-$(HAVE_MMX) += encoder/x86/vp9_variance_impl_mmx.asm
80 VP9_CX_SRCS-$(HAVE_MMX) += encoder/x86/vp9_sad_mmx.asm
81 VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_variance_impl_sse2.asm
82 VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_sad4d_sse2.asm
83 VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_subpel_variance_impl_sse2.asm
84 VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_temporal_filter_apply_sse2.asm
85 VP9_CX_SRCS-$(HAVE_SSE3) += encoder/x86/vp9_sad_sse3.asm
88 VP9_CX_SRCS-$(HAVE_SSE2) += encoder/x86/vp9_error_sse2.as
[all...] |
| /external/llvm/lib/ExecutionEngine/JIT/ |
| Makefile | 16 # Enable the X86 JIT if compiling on X86
17 ifeq ($(ARCH), x86)
22 # of the X86 JIT on non-X86 hosts
|
| /external/llvm/test/CodeGen/X86/ |
| pmovext.ll | 1 ; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
13 %4 = tail call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %3) nounwind
16 tail call void @llvm.x86.sse2.storeu.dq(i8* %5, <16 x i8> %6) nounwind
20 declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone
22 declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind
|
| vec_shift2.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep CPI
5 %tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
12 %tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > ) nounwind readnone
16 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone
17 declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone
|
| 3dnow-intrinsics.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+3dnow | FileCheck %s
10 %4 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %2, x86_mmx %3)
15 declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
21 %1 = tail call x86_mmx @llvm.x86.3dnow.pf2id(x86_mmx %0)
26 declare x86_mmx @llvm.x86.3dnow.pf2id(x86_mmx) nounwind readnone
33 %2 = tail call x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx %0, x86_mmx %1)
38 declare x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx, x86_mmx) nounwind readnone
45 %2 = tail call x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx %0, x86_mmx %1)
50 declare x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx, x86_mmx) nounwind readnone
57 %2 = tail call x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx %0, x86_mmx %1
[all...] |
| vec_ss_load_fold.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse,+sse2,+sse41 | FileCheck %s
11 %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
12 %tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
13 %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
14 %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
15 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
28 %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
29 %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
30 %tmp = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
39 declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>
[all...] |
| fma4-intrinsics-x86_64.ll | 1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mattr=+avx,+fma4 | FileCheck %s
7 %res = call < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float > %a0, < 4 x float > %a1, < 4 x float > %a2) ; <i64> [#uses=1]
14 %res = call < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float > %a0, < 4 x float > %a1, < 4 x float > %y) ; <i64> [#uses=1]
21 %res = call < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float > %a0, < 4 x float > %y, < 4 x float > %a2) ; <i64> [#uses=1]
24 declare < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float >, < 4 x float >, < 4 x float >) nounwind readnone
28 %res = call < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double > %a0, < 2 x double > %a1, < 2 x double > %a2) ; <i64> [#uses=1]
35 %res = call < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double > %a0, < 2 x double > %a1, < 2 x double > %y) ; <i64> [#uses=1]
42 %res = call < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double > %a0, < 2 x double > %y, < 2 x double > %a2) ; <i64> [#uses=1]
45 declare < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double >, < 2 x double >, < 2 x double >) nounwind readnone
49 %res = call < 4 x float > @llvm.x86.fma.vfmadd.ps(< 4 x float > %a0, < 4 x float > %a1, < 4 x float > %a2) ; <i64> [#uses=1
[all...] |
| 2006-10-07-ScalarSSEMiscompile.ll | 1 ; RUN: llc < %s -march=x86 -mattr=sse | grep movaps
10 %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %A, <4 x float> %BV ) ; <<4 x float>> [#uses=1]
14 declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
|
| 2007-06-28-X86-64-isel.ll | 1 ; RUN: llc < %s -march=x86-64 -mattr=+sse2
4 %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
16 declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>)
|
| 2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll | 1 ; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt
2 ; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm
4 ; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call
|
| sse4a.ll | 6 tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
10 declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
15 tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
19 declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
24 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)
28 declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind
34 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
38 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
43 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6)
47 declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwin
[all...] |
| xmm-r64.ll | 1 ; RUN: llc < %s -march=x86-64
4 %tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
11 declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>)
|
| sse_reload_fold.ll | 12 declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>)
13 declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>)
14 declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>)
15 declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>)
16 declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>)
17 declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
18 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>)
19 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>)
20 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>)
21 declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>
[all...] |
| /device/generic/x86/ |
| mini_x86.mk | 18 PRODUCT_DEVICE := x86
20 PRODUCT_MODEL := Mini for x86
23 DEVICE_PACKAGE_OVERLAYS := device/generic/x86/overlay
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/Mkfiles/vc9/genperf/ |
| run.bat | 15 call %_python_% modules\arch\x86\gen_x86_insn.py
21 %1 modules\arch\x86\x86cpu.gperf x86cpu.c
22 %1 modules\arch\x86\x86regtmod.gperf x86regtmod.c
|
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.build.tools/data/ |
| builds-eclipse-3.3.xml | 24 <release arch="x86" os="win32" type="SDK" ws="win">eclipse-SDK-I20060922-0010-win32.zip</release>
25 <release arch="x86" os="linux" type="SDK" ws="gtk">eclipse-SDK-I20060922-0010-linux-gtk.tar.gz</release>
29 <result arch="x86" os="win32" ws="win">UNKNOWN</result>
30 <result arch="x86" os="linux" ws="gtk">UNKNOWN</result>
33 <result arch="x86" os="linux" ws="motif">UNKNOWN</result>
34 <result arch="x86" os="solaris8" ws="gtk">UNKNOWN</result>
35 <result arch="x86" os="aix" ws="motif">UNKNOWN</result>
36 <result arch="x86" os="hp-ux" ws="motif">UNKNOWN</result>
40 <result arch="x86" id="RHEL4-3GHz-2.5GB" os="linux" ws="gtk">PENDING</result>
41 <result arch="x86" id="winxp-3GHz-2GB" os="win32" ws="win">UNKNOWN</result
[all...] |
| /external/llvm/test/DebugInfo/ |
| dwarfdump-dump-flags.test | 1 ; RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test.elf-x86-64 -debug-dump=all | FileCheck %s -check-prefix DUMP_ALL
2 ; RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test.elf-x86-64 -debug-dump=info | FileCheck %s -check-prefix DUMP_INFO
3 ; RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test.elf-x86-64 -debug-dump=ranges | FileCheck %s -check-prefix DUMP_RANGES
|
| /frameworks/compile/mclinker/ |
| Android.mk | 32 # X86 Code Generation Libraries
34 lib/Target/X86 \
35 lib/Target/X86/TargetInfo
|
| /ndk/docs/text/ |
| CPU-X86.text | 1 Android NDK x86 (a.k.a. IA-32) instruction set support
7 Android NDK r6 added support for the '`x86`' ABI, that allows native code to
11 The Android x86 ABI itself is fully specified in docs/CPU-ARCH-ABIS.html.
16 Generating x86 machine code is simple: just add 'x86' to your APP_ABI
19 APP_ABI := armeabi armeabi-v7a x86
32 As you would expect, generated libraries will go into `$PROJECT/libs/x86/`, and
33 will be embedded into your .apk under `/lib/x86/`.
36 libraries on a *compatible* x86-based device automatically at install time,
48 It is possible to use the x86 toolchain with NDK r6 in stand-alone mode
[all...] |
| /ndk/toolchains/x86-4.6/ |
| config.mk | 16 # config file for the x86 gcc-4.6 toolchain for the Android NDK
19 TOOLCHAIN_ARCH := x86
20 TOOLCHAIN_ABIS := x86
|
| /ndk/toolchains/x86-4.7/ |
| config.mk | 16 # config file for the x86 gcc-4.7 toolchain for the Android NDK
19 TOOLCHAIN_ARCH := x86
20 TOOLCHAIN_ABIS := x86
|
| /ndk/toolchains/x86-4.8/ |
| config.mk | 16 # config file for the x86 gcc-4.8 toolchain for the Android NDK
19 TOOLCHAIN_ARCH := x86
20 TOOLCHAIN_ABIS := x86
|
| /ndk/toolchains/x86-clang3.2/ |
| config.mk | 16 # config file for the x86 clang-3.2 toolchain for the Android NDK
19 TOOLCHAIN_ARCH := x86
20 TOOLCHAIN_ABIS := x86
|
| /ndk/toolchains/x86-clang3.3/ |
| config.mk | 16 # config file for the x86 clang-3.3 toolchain for the Android NDK
19 TOOLCHAIN_ARCH := x86
20 TOOLCHAIN_ABIS := x86
|
| /prebuilts/tools/linux-x86/sdl/ |
| PREBUILT | 6 $ ./android-configure.sh --prefix=$ANDROID/prebuilts/tools/linux-x86/sdl
14 $ cp objs/libs/libSDL.a $ANDROID/prebuilts/tools/linux-x86/sdl/libs/lib64SDL.a
15 $ cp objs/libs/libSDLmain.a $ANDROID/prebuilts/linux-x86/sdl/libs/lib64SDLmain.a
|
