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  /external/clang/test/CodeGen/
xop-builtins.c 1 // RUN: %clang_cc1 %s -O3 -triple=x86_64-apple-darwin -target-feature +xop -emit-llvm -o - | FileCheck %s
9 // CHECK: @llvm.x86.xop.vpmacssww
14 // CHECK: @llvm.x86.xop.vpmacsww
19 // CHECK: @llvm.x86.xop.vpmacsswd
24 // CHECK: @llvm.x86.xop.vpmacswd
29 // CHECK: @llvm.x86.xop.vpmacssdd
34 // CHECK: @llvm.x86.xop.vpmacsdd
39 // CHECK: @llvm.x86.xop.vpmacssdql
44 // CHECK: @llvm.x86.xop.vpmacsdql
49 // CHECK: @llvm.x86.xop.vpmacssdq
    [all...]
  /external/llvm/test/CodeGen/X86/
xop-intrinsics-x86_64.ll 1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mattr=+avx,+fma4,+xop | FileCheck %s
5 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 1) ; [#uses=1]
12 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %vec, <2 x double> %a2, i8 1) ; [#uses=1]
19 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %vec, i8 1) ; [#uses=1]
22 declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone
27 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, i8 2) ;
35 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %vec, <4 x double> %a2, i8 2) ;
43 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %vec, i8 2) ;
46 declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x double>, i8) nounwind readnone
50 %res = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 3)
    [all...]
  /external/clang/lib/Headers/
module.map 135 explicit module xop {
136 requires xop
xopintrin.h 1 /*===---- xopintrin.h - XOP intrinsics -------------------------------------===
32 # error "XOP instruction set is not enabled"
  /external/chromium_org/third_party/openssl/openssl/crypto/
x86_64cpuid.pl 97 and \$0x00000801,%r9d # isolate AMD XOP bit, 1<<11
153 and \$0x00000800,%r9d # isolate AMD XOP flag
155 or %ecx,%r9d # merge AMD XOP flag
167 and %eax,%r9d # clear AVX, FMA and AMD XOP bits
x86cpuid.pl 60 &and ("ebp",1<<11|1); # isolate XOP bit
117 &and ("ebp",1<<11); # isolate AMD XOP flag
120 &or ("ebp","ecx"); # merge AMD XOP flag
135 &and ("ebp",0xefffe7ff); # clear AVX, FMA and AMD XOP bits
  /external/openssl/crypto/
x86_64cpuid.pl 97 and \$0x00000801,%r9d # isolate AMD XOP bit, 1<<11
153 and \$0x00000800,%r9d # isolate AMD XOP flag
155 or %ecx,%r9d # merge AMD XOP flag
167 and %eax,%r9d # clear AVX, FMA and AMD XOP bits
x86cpuid.pl 60 &and ("ebp",1<<11|1); # isolate XOP bit
117 &and ("ebp",1<<11); # isolate AMD XOP flag
120 &or ("ebp","ecx"); # merge AMD XOP flag
135 &and ("ebp",0xefffe7ff); # clear AVX, FMA and AMD XOP bits
  /external/chromium_org/third_party/sqlite/src/src/
test7.c 54 void (*xOp)(Thread*); /* next operation to do */
55 char *zArg; /* argument usable by xOp */
97 while( p->xOp ){
102 (*p->xOp)(p);
222 p->xOp = 0;
508 threadset[i].xOp = do_compile;
561 threadset[i].xOp = do_step;
603 threadset[i].xOp = do_finalize;
647 threadset[i].xOp = do_reset;
test4.c 32 void (*xOp)(Thread*); /* next operation to do */
33 char *zArg; /* argument usable by xOp */
75 while( p->xOp ){
80 (*p->xOp)(p);
199 p->xOp = 0;
477 threadset[i].xOp = do_compile;
530 threadset[i].xOp = do_step;
572 threadset[i].xOp = do_finalize;
  /external/llvm/lib/IR/
AutoUpgrade.cpp 100 (Name.startswith("x86.xop.vpcom") && F->arg_size() == 2)) {
114 if (Name.startswith("x86.xop.vfrcz.ss") && F->arg_size() == 2) {
120 if (Name.startswith("x86.xop.vfrcz.sd") && F->arg_size() == 2) {
215 } else if (Name.startswith("llvm.x86.xop.vpcom")) {
236 Name = Name.substr(18); // strip off "llvm.x86.xop.vpcom"
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/
x86id.c 165 OPA_VEX = 12, /* operand data goes into VEX/XOP "vvvv" field */
166 /* operand data goes into BOTH VEX/XOP "vvvv" field and ea field */
168 /* operand data goes into BOTH VEX/XOP "vvvv" field and spare field */
238 /* Tests against BITS==64, AVX, and XOP */
277 * 0x80 - 0x8F indicate a XOP prefix, with the four LSBs holding "WLpp":
1597 int xop = ((vexdata & 0xF0) == 0x80); local
    [all...]
gen_x86_insn.py 43 "AVX", "FMA", "AES", "CLMUL", "MOVBE", "XOP", "FMA4", "F16C",
55 # Predefined XOP prefix field values
232 # XOP prefix
233 if "xop" in kwargs:
236 raise ValueError("XOP.W must be 0 or 1")
238 xopL = kwargs.pop("xop")
244 raise ValueError("XOP.L must be 128 or 256")
249 raise ValueError("Cannot combine XOP and special prefix %s"
7510 xop=128, variable
7517 xop=256, variable
7526 xop=128, variable
7532 xop=128, variable
7540 xop=128, variable
7546 xop=128, variable
7554 xop=128, variable
7563 xop=128, variable
7572 xop=256, variable
7581 xop=256, variable
7594 xop=128, variable
7602 xop=128, variable
7627 xop=128, variable
7653 xop=128, variable
7675 xop=128, variable
7684 xop=128, variable
7696 xop=128, variable
7705 xop=128, variable
7714 xop=128, variable
7725 xop=128, variable
7734 xop=128, variable
    [all...]
x86arch.h 73 #define CPU_XOP 39 /* AMD XOP extensions */
x86cpu.gperf 375 xop, x86_cpu_set, CPU_XOP
  /external/qemu/
ppc-dis.c     [all...]
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/
Makefile.inc 250 EXTRA_DIST += modules/arch/x86/tests/xop-all.asm
251 EXTRA_DIST += modules/arch/x86/tests/xop-all.hex
252 EXTRA_DIST += modules/arch/x86/tests/xop-basic.asm
253 EXTRA_DIST += modules/arch/x86/tests/xop-basic.hex
254 EXTRA_DIST += modules/arch/x86/tests/xop-cc.asm
255 EXTRA_DIST += modules/arch/x86/tests/xop-cc.hex
  /external/llvm/lib/Target/X86/
X86InstrFormats.td 164 class XOP { bit hasXOP_Prefix = 1; }
216 bit hasXOP_Prefix = 0; // Does this inst require an XOP prefix?
702 // XOP 2, 3 and 4 Operand Instruction Template
706 XOP, XOP9, Requires<[HasXOP]>;
708 // XOP 2, 3 and 4 Operand Instruction Templates with imm byte
712 XOP, XOP8, Requires<[HasXOP]>;
714 // XOP 5 operand instruction (VEX encoding!)
    [all...]
X86CodeEmitter.cpp 842 // XOP: Use XOP prefix byte 0x8f instead of VEX.
843 unsigned char XOP = 0;
852 // 0b01000: XOP map select - 08h instructions with imm byte
853 // 0b10001: XOP map select - 09h instructions with no imm byte
884 if ((TSFlags >> X86II::VEXShift) & X86II::XOP)
885 XOP = 1;
    [all...]
X86InstrXOP.td 1 //===-- X86InstrXOP.td - XOP Instruction Set ---------------*- tablegen -*-===//
10 // This file describes XOP (eXtended OPerations)
X86.td 111 def FeatureXOP : SubtargetFeature<"xop", "HasXOP", "true",
112 "Enable XOP instructions",
  /external/llvm/lib/Target/X86/MCTargetDesc/
X86MCCodeEmitter.cpp 566 // XOP: Use XOP prefix byte 0x8f instead of VEX.
567 unsigned char XOP = 0;
576 // 0b01000: XOP map select - 08h instructions with imm byte
577 // 0b10001: XOP map select - 09h instructions with no imm byte
622 if ((TSFlags >> X86II::VEXShift) & X86II::XOP)
623 XOP = 1;
905 if (VEX_B && VEX_X && !VEX_W && !XOP && (VEX_5M == 1)) { // 2 byte VEX prefix
912 EmitByte(XOP ? 0x8F : 0xC4, CurByte, OS);
    [all...]
X86BaseInfo.h 508 /// ModRM or I8IMM. This is used for FMA4 and XOP instructions.
511 /// XOP - Opcode prefix used by XOP instructions.
512 XOP = 1U << 19
  /prebuilts/sdk/renderscript/clang-include/
xopintrin.h 1 /*===---- xopintrin.h - XOP intrinsics -------------------------------------===
32 # error "XOP instruction set is not enabled"
  /external/clang/lib/Basic/
Targets.cpp     [all...]

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