| /prebuilts/tools/common/m2/internal/asm/asm-tree/3.3/ |
| asm-tree-3.3.jar | |
| /prebuilts/tools/common/m2/repository/org/ow2/asm/asm-tree/4.0/ |
| asm-tree-4.0.jar | |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_fs_visitor.cpp | 192 fs_inst *pre_inst = (fs_inst *) this->instructions.get_tail();
197 fs_inst *last_inst = (fs_inst *) this->instructions.get_tail();
219 /* 3-src instructions were introduced in gen6. */
670 * up reliably removing instructions where it can be tricky to do so
716 fs_inst *pre_rhs_inst = (fs_inst *) this->instructions.get_tail();
721 fs_inst *last_rhs_inst = (fs_inst *) this->instructions.get_tail();
833 * instructions. We'll need to do SIMD16 here.
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs_visitor.cpp | 192 fs_inst *pre_inst = (fs_inst *) this->instructions.get_tail();
197 fs_inst *last_inst = (fs_inst *) this->instructions.get_tail();
219 /* 3-src instructions were introduced in gen6. */
670 * up reliably removing instructions where it can be tricky to do so
716 fs_inst *pre_rhs_inst = (fs_inst *) this->instructions.get_tail();
721 fs_inst *last_rhs_inst = (fs_inst *) this->instructions.get_tail();
833 * instructions. We'll need to do SIMD16 here.
[all...] |
| /external/v8/src/arm/ |
| lithium-arm.cc | 64 // Call instructions can use only fixed registers as temporaries and
448 LInstruction* first_instr = instructions()->at(first);
449 LInstruction* last_instr = instructions()->at(last);
458 LInstruction* cur = instructions()->at(i);
956 int start = chunk_->instructions()->length();
964 int end = chunk_->instructions()->length() - 1;
[all...] |
| /external/v8/src/mips/ |
| lithium-mips.cc | 64 // Call instructions can use only fixed registers as temporaries and
448 LInstruction* first_instr = instructions()->at(first);
449 LInstruction* last_instr = instructions()->at(last);
458 LInstruction* cur = instructions()->at(i);
956 int start = chunk_->instructions()->length();
964 int end = chunk_->instructions()->length() - 1;
[all...] |
| assembler-mips.cc | 55 // can be defined to enable FPU instructions when building the
188 // Patch the code at the current address with the supplied instructions.
189 void RelocInfo::PatchCode(byte* instructions, int instruction_count) {
191 Instr* instr = reinterpret_cast<Instr*>(instructions);
202 // Additional guard instructions can be added if required.
235 // Specific instructions, constants, and masks.
263 // A mask for the Rt register for push, pop, lw, sw instructions.
814 // Keep track of the last bound label so we don't eliminate any instructions
920 // Instructions with immediate value.
1057 //------- Branch and jump instructions -------
[all...] |
| /external/v8/src/x64/ |
| lithium-x64.cc | 74 // Call instructions can use only fixed registers as temporaries and
390 LInstruction* first_instr = instructions()->at(first);
391 LInstruction* last_instr = instructions()->at(last);
400 LInstruction* cur = instructions()->at(i);
951 int start = chunk_->instructions()->length();
959 int end = chunk_->instructions()->length() - 1;
[all...] |
| /external/llvm/bindings/ocaml/llvm/ |
| llvm.mli | 32 (** Any value in the LLVM IR. Functions, instructions, global variables,
43 (** Used to generate instructions in the LLVM IR. See the [llvm::LLVMBuilder]
186 (** The opcodes for LLVM instructions and constant expressions. *)
190 (* Terminator Instructions *)
572 the symbol name. For instructions and basic blocks, it is the SSA register
669 (** {7 Operations on instructions} *)
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/ |
| sparccpuid.S | 246 ! takes to execute rdtick and pair of VIS1 instructions. US-Tx VIS unit
|
| /external/chromium_org/v8/src/ |
| assembler.h | 106 // Avoids using instructions that vary in size in unpredictable ways between the
371 // instructions).
409 // should return the end of the instructions to be patched, allowing the
410 // deserializer to deserialize the instructions as raw bytes and put them in
431 void PatchCode(byte* instructions, int instruction_count);
478 // across two consecutive 32-bit instructions. Heap management
[all...] |
| lithium.h | 754 const ZoneList<LInstruction*>* instructions() const { return &instructions_; } function in class:v8::internal::LChunk
|
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.cc | 61 // can be defined to enable FPU instructions when building the
214 // Patch the code at the current address with the supplied instructions.
215 void RelocInfo::PatchCode(byte* instructions, int instruction_count) {
217 Instr* instr = reinterpret_cast<Instr*>(instructions);
228 // Additional guard instructions can be added if required.
265 // Specific instructions, constants, and masks.
293 // A mask for the Rt register for push, pop, lw, sw instructions.
808 // Keep track of the last bound label so we don't eliminate any instructions
926 // Instructions with immediate value.
1062 //------- Branch and jump instructions -------
[all...] |
| macro-assembler-mips.h | 49 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
83 // Always use 2 instructions (lui/ori pair), even if the constant could
165 // Jump, Call, and Ret pseudo instructions implementing inter-working.
207 // 2 instructions.
448 // nop(type)). These instructions are generated to mark special location in
601 // Pseudo-instructions.
715 void FlushICache(Register address, unsigned instructions);
[all...] |
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.pde.build_3.6.1.R36x_v20100823/lib/ |
| pdebuild-ant.jar | |
| /external/openssl/crypto/ |
| sparccpuid.S | 246 ! takes to execute rdtick and pair of VIS1 instructions. US-Tx VIS unit
|
| /external/v8/src/ |
| assembler.h | 272 // instructions).
305 // should return the end of the instructions to be patched, allowing the
306 // deserializer to deserialize the instructions as raw bytes and put them in
327 void PatchCode(byte* instructions, int instruction_count);
367 // across two consecutive 32-bit instructions. Heap management
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssembler.cpp | 367 #pragma mark DSP instructions...
370 // DSP instructions...
|
| /dalvik/dx/src/com/android/dx/merge/ |
| DexMerger.java | 835 short[] instructions = code.getInstructions(); local
839 short[] newInstructions = transformer.transform(instructions);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| tgsi_exec.c | 45 * ContMask) which are controlled by the flow control instructions (namely:
623 * Initialize machine state by expanding tokens to full instructions,
636 struct tgsi_full_instruction *instructions; local
662 if (mach->Instructions) {
663 FREE( mach->Instructions );
665 mach->Instructions = NULL;
715 instructions = (struct tgsi_full_instruction *)
718 if (!instructions) {
783 instructions = REALLOC(instructions,
[all...] |
| /external/chromium_org/v8/tools/gyp/ |
| v8_base.arm.host.darwin-arm.mk | 86 v8/src/hydrogen-instructions.cc \
|
| v8_base.arm.host.linux-arm.mk | 86 v8/src/hydrogen-instructions.cc \
|
| v8_base.ia32.host.darwin-x86.mk | 86 v8/src/hydrogen-instructions.cc \
|
| v8_base.ia32.host.linux-x86.mk | 86 v8/src/hydrogen-instructions.cc \
|
| v8_base.mipsel.host.darwin-mips.mk | 86 v8/src/hydrogen-instructions.cc \
|
