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  /external/mesa3d/src/glsl/
lower_discard.cpp 125 lower_discard(exec_list *instructions)
129 visit_list_elements(&v, instructions);
136 find_discard(exec_list &instructions)
138 foreach_list(n, &instructions) {
loop_analysis.h 36 analyze_loop_variables(exec_list *instructions);
56 set_loop_controls(exec_list *instructions, loop_state *ls);
60 unroll_loops(exec_list *instructions, loop_state *ls, unsigned max_iterations);
121 * Number of ir_loop_jump instructions that operate on this loop
ast.h 79 virtual ir_rvalue *hir(exec_list *instructions,
215 virtual ir_rvalue *hir(exec_list *instructions,
285 virtual ir_rvalue *hir(exec_list *instructions,
311 virtual ir_rvalue *hir(exec_list *instructions,
460 virtual ir_rvalue *hir(exec_list *instructions,
525 virtual ir_rvalue *hir(exec_list *instructions,
559 virtual ir_rvalue *hir(exec_list *instructions,
590 virtual ir_rvalue *hir(exec_list *instructions,
628 virtual ir_rvalue *hir(exec_list *instructions,
640 virtual ir_rvalue *hir(exec_list *instructions,
    [all...]
opt_dead_functions.cpp 115 do_dead_functions(exec_list *instructions)
120 visit_list_elements(&v, instructions);
140 foreach_iter(exec_list_iterator, iter, *instructions) {
  /external/chromium_org/third_party/mesa/src/src/glsl/
loop_analysis.h 36 analyze_loop_variables(exec_list *instructions);
56 set_loop_controls(exec_list *instructions, loop_state *ls);
60 unroll_loops(exec_list *instructions, loop_state *ls, unsigned max_iterations);
121 * Number of ir_loop_jump instructions that operate on this loop
ast.h 79 virtual ir_rvalue *hir(exec_list *instructions,
215 virtual ir_rvalue *hir(exec_list *instructions,
285 virtual ir_rvalue *hir(exec_list *instructions,
311 virtual ir_rvalue *hir(exec_list *instructions,
460 virtual ir_rvalue *hir(exec_list *instructions,
525 virtual ir_rvalue *hir(exec_list *instructions,
559 virtual ir_rvalue *hir(exec_list *instructions,
590 virtual ir_rvalue *hir(exec_list *instructions,
628 virtual ir_rvalue *hir(exec_list *instructions,
640 virtual ir_rvalue *hir(exec_list *instructions,
    [all...]
opt_dead_functions.cpp 115 do_dead_functions(exec_list *instructions)
120 visit_list_elements(&v, instructions);
140 foreach_iter(exec_list_iterator, iter, *instructions) {
  /external/oprofile/events/i386/atom/
unit_masks 10 0x01 prefetcht0 Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed
11 0x06 sw_l2 Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed
12 0x08 prefetchnta Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed
49 0x02 cisc_decoded CISC macro instructions decoded
50 0x03 all_decoded All Instructions decoded
73 0x00 any Retired branch instructions
74 0x01 pred_not_taken Retired branch instructions that were predicted not-taken
75 0x02 mispred_not_taken Retired branch instructions that were mispredicted not-taken
76 0x04 pred_taken Retired branch instructions that were predicted taken
77 0x08 mispred_taken Retired branch instructions that were mispredicted take
    [all...]
  /external/oprofile/events/mips/34K/
events 15 event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS : 1-0 Instructions completed
21 event:0x2 counters:0 um:zero minimum:500 name:BRANCH_INSNS : 2-0 Branch instructions (whether completed or mispredicted)
22 event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed
23 event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict)
32 event:0xe counters:0 um:zero minimum:500 name:INTEGER_INSNS : 14-0 Integer instructions completed
33 event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP)
34 event:0x10 counters:0 um:zero minimum:500 name:J_JAL_INSNS : 16-0 J/JAL instructions completed
35 event:0x11 counters:0 um:zero minimum:500 name:NO_OPS_INSNS : 17-0 no-ops completed, ie instructions writing $0
37 event:0x13 counters:0 um:zero minimum:500 name:SC_INSNS : 19-0 SC instructions complete
    [all...]
  /external/oprofile/events/mips/24K/
events 15 event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS : 1-0 Instructions completed
21 event:0x2 counters:0 um:zero minimum:500 name:BRANCH_INSNS : 2-0 Branch instructions (whether completed or mispredicted)
22 event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed
23 event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict)
32 event:0xe counters:0 um:zero minimum:500 name:INTEGER_INSNS : 14-0 Integer instructions completed
33 event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP)
34 event:0x10 counters:0 um:zero minimum:500 name:J_JAL_INSNS : 16-0 J/JAL instructions completed
35 event:0x11 counters:0 um:zero minimum:500 name:NO_OPS_INSNS : 17-0 no-ops completed, ie instructions writing $0
37 event:0x13 counters:0 um:zero minimum:500 name:SC_INSNS : 19-0 SC instructions complete
    [all...]
  /external/chromium_org/third_party/mach_override/
mach_override.c 50 // kOriginalInstructionsSize nop instructions so that we
51 // should have enough space to host original instructions
67 // kOriginalInstructionsSize nop instructions so that we
68 // should have enough space to host original instructions
90 char instructions[sizeof(kIslandTemplate)]; member in struct:__anon14182
123 char* instructions );
217 //printf ("Too many instructions eaten\n");
276 // jmp instructions and so has all the same addressing reachability requirements
317 // o Insert the original instructions into the reentry island.
320 // o Replace the original first instructions with the jump relative
    [all...]
  /external/valgrind/main/none/tests/ppc32/
test_isa_2_06_part3.stdout.exp 1 Test VSX vector and scalar single argument instructions
421 Test VSX vector integer to float conversion instructions
    [all...]
  /external/valgrind/main/none/tests/ppc64/
test_isa_2_06_part3.stdout.exp 1 Test VSX vector and scalar single argument instructions
421 Test VSX vector integer to float conversion instructions
    [all...]
  /art/compiler/utils/
assembler.cc 67 void AssemblerBuffer::FinalizeInstructions(const MemoryRegion& instructions) {
68 // Copy the instructions from the buffer.
70 instructions.CopyFrom(0, from);
71 // Process fixups in the instructions.
72 ProcessFixups(instructions);
  /external/chromium_org/sandbox/linux/seccomp-bpf/
codegen.h 19 typedef std::vector<Instruction *> Instructions;
26 // graph of BPF instructions into a well-formed stream of BPF instructions.
28 // the limit of 255 instructions imposed by the instruction set.
31 // build a DAG of Instructions. They'll eventually call Compile() to convert
34 // Instructions can be chained at the time when they are created, or they
65 // Create a new instruction. Instructions form a DAG. The instruction objects
75 // Join two (sequences of) instructions. This is useful, if the "next"
80 // Traverse the graph of instructions and visit each instruction once.
89 // Compiles the graph of instructions into a BPF program that can be passe
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/
lp_bld_tgsi.c 42 /* The user is responsible for freeing list->instructions */
45 bld_base->instructions = (struct tgsi_full_instruction *)
47 if (!bld_base->instructions) {
61 struct tgsi_full_instruction *instructions; local
62 instructions = REALLOC(bld_base->instructions, bld_base->max_instructions
66 if (!instructions) {
69 bld_base->instructions = instructions;
72 memcpy(bld_base->instructions + bld_base->num_instructions, inst_to_add
    [all...]
  /external/mesa3d/src/gallium/auxiliary/gallivm/
lp_bld_tgsi.c 42 /* The user is responsible for freeing list->instructions */
45 bld_base->instructions = (struct tgsi_full_instruction *)
47 if (!bld_base->instructions) {
61 struct tgsi_full_instruction *instructions; local
62 instructions = REALLOC(bld_base->instructions, bld_base->max_instructions
66 if (!instructions) {
69 bld_base->instructions = instructions;
72 memcpy(bld_base->instructions + bld_base->num_instructions, inst_to_add
    [all...]
  /dalvik/dx/src/com/android/dx/io/instructions/
OneRegisterDecodedInstruction.java 17 package com.android.dx.io.instructions;
RegisterRangeDecodedInstruction.java 17 package com.android.dx.io.instructions;
ShortArrayCodeInput.java 17 package com.android.dx.io.instructions;
TwoRegisterDecodedInstruction.java 17 package com.android.dx.io.instructions;
  /external/dexmaker/src/dx/java/com/android/dx/io/instructions/
OneRegisterDecodedInstruction.java 17 package com.android.dx.io.instructions;
RegisterRangeDecodedInstruction.java 17 package com.android.dx.io.instructions;
ShortArrayCodeInput.java 17 package com.android.dx.io.instructions;
TwoRegisterDecodedInstruction.java 17 package com.android.dx.io.instructions;

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