| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 176 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
193 /// results. The first result is the normal add or sub result, the second
199 /// the add or sub, and the third is the input carry flag. These nodes
200 /// produce two results; the normal result of the add or sub, and the output
202 /// to them to be chained together for add and sub of arbitrarily large
207 /// These nodes take two operands: the normal LHS and RHS to the add. They
208 /// produce two results: the normal result of the add, and a boolean that
212 /// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
342 /// integer shift operations, just like ADD/SUB_PARTS. The operation
651 /// PRE_DEC the value of the base pointer add / subtract the offset
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 105 setOperationAction(ISD::ADD, VT, Expand);
373 SDValue RCP_A_E = DAG.getNode(ISD::ADD, DL, VT, RCP, E);
409 SDValue Quotient_A_One = DAG.getNode(ISD::ADD, DL, VT, Quotient,
430 SDValue Remainder_A_Den = DAG.getNode(ISD::ADD, DL, VT, Remainder, Den);
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 51 OP12(ADD)
|
| /external/proguard/src/proguard/evaluation/value/ |
| SpecificLongValue.java | 60 public LongValue add(LongValue other) method in class:SpecificLongValue
62 return other.add(this);
148 public LongValue add(SpecificLongValue other) method in class:SpecificLongValue
150 return new CompositeLongValue(this, CompositeLongValue.ADD, other);
|
| /external/v8/src/mips/ |
| constants-mips.cc | 255 case ADD:
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 428 ADD pThresholds, #4
438 ADD pQ0, pQ0, #4
447 ADD pThresholds, pThresholds, #4
533 ADD pQ0, pQ0, srcdstStep, LSL #2
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_DeblockingChroma_unsafe_s.s | 188 ADD pThresholds, pThresholds, #4
|
| armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.s | 74 ADD Temp, pSrc, srcStep, LSL #2
|
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 238 ADD pVRow,pVRow,QPmod
349 ADD DCval,DCval,#32
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 19 ADD pc,pc,r12,LSL #2
|
| omxVCM4P10_FilterDeblockingChroma_HorEdge_I_s.S | 79 ADD r5,r5,#4
|
| /frameworks/base/tests/HwAccelerationTest/src/com/android/test/hwui/ |
| AdvancedBlendActivity.java | 93 PorterDuff.Mode.ADD);
|
| /external/chromium_org/media/base/simd/ |
| scale_yuv_to_rgb_sse2_x64.asm | 64 paddsw xmm0, xmm1 ; Hide a ADD after memory load.
78 add ARGBq, 8
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_lowering_nv50.cpp | 320 // only ADDR <- SHL(GPR, IMM) and ADDR <- ADD(ADDR, IMM) are valid
364 Instruction *add = mul; local
365 bld.setPosition(add, false);
367 mul = bld.mkOp2(OP_MUL, add->sType, res, add->getSrc(0), add->getSrc(1));
368 add->op = OP_ADD;
369 add->setSrc(0, mul->getDef(0));
370 add->setSrc(1, add->getSrc(2))
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| nv50_ir_lowering_nvc0.cpp | 182 bool add = true; local
186 add = false;
194 if (add)
339 // and did not count the TEXes in the destination block, add those
641 // move array source to first slot, convert to u16, add indirections
753 { QUADOP(MOV2, ADD, MOV2, ADD), QUADOP(MOV2, MOV2, ADD, ADD) }, // l0
754 { QUADOP(SUBR, MOV2, SUBR, MOV2), QUADOP(MOV2, MOV2, ADD, ADD) }, // l
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb-diagnostics.s | 8 @ ADD instruction w/o 'S' suffix.
9 add r1, r2, r3
11 @ CHECK-ERRORS: add r1, r2, r3
15 add r2, r3
18 @ CHECK-ERRORS: add r2, r3
119 @ Out of range immediate for ADD SP instructions
120 add sp, #-1
121 add sp, #3
122 add sp, sp, #512
123 add r2, sp, #102
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_lowering_nv50.cpp | 320 // only ADDR <- SHL(GPR, IMM) and ADDR <- ADD(ADDR, IMM) are valid
364 Instruction *add = mul; local
365 bld.setPosition(add, false);
367 mul = bld.mkOp2(OP_MUL, add->sType, res, add->getSrc(0), add->getSrc(1));
368 add->op = OP_ADD;
369 add->setSrc(0, mul->getDef(0));
370 add->setSrc(1, add->getSrc(2))
[all...] |
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| nv50_ir_lowering_nvc0.cpp | 182 bool add = true; local
186 add = false;
194 if (add)
339 // and did not count the TEXes in the destination block, add those
641 // move array source to first slot, convert to u16, add indirections
753 { QUADOP(MOV2, ADD, MOV2, ADD), QUADOP(MOV2, MOV2, ADD, ADD) }, // l0
754 { QUADOP(SUBR, MOV2, SUBR, MOV2), QUADOP(MOV2, MOV2, ADD, ADD) }, // l
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_s.h | 243 ADD pc, pc, $v, LSL #2
248 ;// Add a case to the switch statement
490 ADD $_base, $_base, $_offset
507 ADD $_base, $_base, $_offset
576 _M_OPC ADD$cc, $a, sp, (_Workspace + $b$_F)
582 _M_OPC ADD$cc, $a, sp, (_Workspace + $b$_F$_16)
591 _M_OPC ADD$cc, $a, sp, (_Workspace + $b$_F$_32)
783 _M_OPC ADD, sp, sp, _SBytes
866 ADD sp, sp, #16
|
| armCOMM_IDCT_s.h | 569 ADD xi0, xi0, xit, LSL #2 ;// ensure correct round
623 ADD pDest, pDest, pScale
625 ADD pDest, pDest, pScale
627 ADD pDest, pDest, #($stride)
629 ADD pDest, pDest, #($stride)
647 ADD pDest, pDest, pScale
649 ADD pDest, pDest, pScale
651 ADD pDest, pDest, #($stride)
653 ADD pDest, pDest, #($stride)
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_s.h | 246 ADD pc, pc, $v, LSL #2
251 ;// Add a case to the switch statement
493 ADD $_base, $_base, $_offset
510 ADD $_base, $_base, $_offset
579 _M_OPC ADD$cc, $a, sp, (_Workspace + $b$_F)
585 _M_OPC ADD$cc, $a, sp, (_Workspace + $b$_F$_16)
594 _M_OPC ADD$cc, $a, sp, (_Workspace + $b$_F$_32)
786 _M_OPC ADD, sp, sp, _SBytes
869 ADD sp, sp, #16
|
| armCOMM_IDCT_s.h | 575 ADD xi0, xi0, xit, LSL #2 ;// ensure correct round
629 ADD pDest, pDest, pScale
631 ADD pDest, pDest, pScale
633 ADD pDest, pDest, #($stride)
635 ADD pDest, pDest, #($stride)
653 ADD pDest, pDest, pScale
655 ADD pDest, pDest, pScale
657 ADD pDest, pDest, #($stride)
659 ADD pDest, pDest, #($stride)
[all...] |
| /external/icu4c/test/intltest/ |
| calregts.cpp | 192 cal1->add(UCAL_DATE, 1, status) ;
193 failure(status, "cal1->add");
220 cal1->add(UCAL_MONTH,8,status);
221 failure(status, "->add(UCAL_MONTH,8)");
347 calendar->add(UCAL_SECOND,6, status);
359 errln(UnicodeString("Fail: Calendar::add misbehaves"));
504 cal->add(UCAL_HOUR_OF_DAY, 6,status);
545 //cal.add(field, amount); //<-- PROBLEM SEEN WITH field = DATE,MONTH
550 cal->add(UCAL_DATE, 1, status);
666 foo1->add(UCAL_DATE, + 1, status)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 107 return DAG.getNode(ISD::ADD, DL, Ty,
124 return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo);
143 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty));
283 setOperationAction(ISD::ADD, MVT::i32, Custom);
285 setOperationAction(ISD::ADD, MVT::i64, Custom);
395 setTargetDAGCombine(ISD::ADD);
511 // Assume the 3rd operand is a CondCodeSDNode. Add code to check the type of
660 // (add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt)
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| Rops.java | 210 new Rop(RegOps.ADD, Type.INT, StdTypeList.INT_INT, "add-int");
214 new Rop(RegOps.ADD, Type.LONG, StdTypeList.LONG_LONG, "add-long");
218 new Rop(RegOps.ADD, Type.FLOAT, StdTypeList.FLOAT_FLOAT, "add-float");
222 new Rop(RegOps.ADD, Type.DOUBLE, StdTypeList.DOUBLE_DOUBLE,
223 Rop.BRANCH_NONE, "add-double");
371 new Rop(RegOps.ADD, Type.INT, StdTypeList.INT, "add-const-int")
[all...] |
