/external/kernel-headers/original/asm-x86/ |
string_32.h | 35 __asm__ __volatile__( 78 __asm__ __volatile__( 86 if (n >= 4*4) __asm__ __volatile__("movsl" 88 if (n >= 3*4) __asm__ __volatile__("movsl" 90 if (n >= 2*4) __asm__ __volatile__("movsl" 92 if (n >= 1*4) __asm__ __volatile__("movsl" 98 case 1: __asm__ __volatile__("movsb" 101 case 2: __asm__ __volatile__("movsw" 104 default: __asm__ __volatile__("movsw\n\tmovsb" 163 __asm__ __volatile__ [all...] |
msr.h | 179 __asm__ __volatile__("rdmsr" \ 185 __asm__ __volatile__("rdmsr" \ 192 __asm__ __volatile__("wrmsr" \ 199 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) 202 __asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx") 205 __asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux)) 209 __asm__ __volatile__("rdtsc" : "=a" (__a), "=d" (__d)); \ 215 __asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \ 224 __asm__ __volatile__("rdpmc" \ 232 __asm__("cpuid [all...] |
/external/mesa3d/src/mapi/mapi/ |
entry_x86-64_tls.h | 32 __asm__(".section .note.ABI-tag, \"a\"\n\t" 44 __asm__(".text\n" 64 __asm__("x86_64_current_tls:\n\t"
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/external/libvpx/libvpx/vp8/common/mips/dspr2/ |
loopfilter_filters_dspr2.c | 22 __asm__ __volatile__ ( 33 __asm__ __volatile__ ( 65 __asm__ __volatile__ ( 124 __asm__ __volatile__ ( 216 __asm__ __volatile__ ( 256 __asm__ __volatile__ ( 291 __asm__ __volatile__ ( 321 __asm__ __volatile__ ( 728 __asm__ __volatile__ ( 752 __asm__ __volatile__ [all...] |
/external/chromium_org/third_party/leveldatabase/src/port/ |
atomic_pointer.h | 58 __asm__ __volatile__("" : : : "memory"); 160 __asm__ __volatile__ ( 169 __asm__ __volatile__ ( 190 __asm__ __volatile__ ( 199 __asm__ __volatile__ (
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/external/chromium_org/third_party/libwebp/dsp/ |
enc_neon.c | 35 __asm__ volatile ( 156 __asm__ volatile ( 241 __asm__ volatile ( 348 __asm__ volatile ( 426 __asm__ volatile (
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/external/kernel-headers/original/asm-mips/ |
sgiarcs.h | 378 __asm__ __volatile__( \ 391 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 393 __asm__ __volatile__( \ 406 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 407 register signed int __a2 __asm__("$5") = (int) (long) (a2); \ 409 __asm__ __volatile__( \ 422 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 423 register signed int __a2 __asm__("$5") = (int) (long) (a2); \ 424 register signed int __a3 __asm__("$6") = (int) (long) (a3); \ 426 __asm__ __volatile__( [all...] |
mipsmtregs.h | 172 __asm__ __volatile__( 190 __asm__ __volatile__( 215 __asm__ __volatile__( 232 __asm__ __volatile__( 254 __asm__ __volatile__( 264 __asm__ __volatile__( \ 281 __asm__ __volatile__( \ 298 __asm__ __volatile__( \ 307 __asm__ __volatile__( \ 320 __asm__ __volatile__( [all...] |
/external/webp/src/dsp/ |
enc_neon.c | 35 __asm__ volatile ( 156 __asm__ volatile ( 241 __asm__ volatile ( 348 __asm__ volatile ( 426 __asm__ volatile (
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/external/chromium_org/third_party/tcmalloc/chromium/src/base/ |
atomicops-internals-arm-v6plus.h | 67 __asm__ __volatile__( 86 __asm__ __volatile__( 101 __asm__ __volatile__( 115 __asm__ __volatile__("dmb" : : : "memory"); 121 __asm__ __volatile__( 190 __asm__ __volatile__( 212 __asm__ __volatile__( 228 __asm__ __volatile__( 246 __asm__ __volatile__( 264 __asm__ __volatile__ [all...] |
linux_syscall_support.h | 547 #define __SYS_REG(name) register long __sysreg __asm__("r6") = __NR_##name; 804 * at optimizing across __asm__ calls. 810 __asm__ __volatile__("push %%ebx\n" \ 823 __asm__ volatile("int $0x80" \ 865 __asm__ __volatile__("push %%ebx\n" \ 884 __asm__ __volatile__("push %%ebp\n" \ [all...] |
/external/chromium_org/third_party/tcmalloc/vendor/src/base/ |
atomicops-internals-arm-v6plus.h | 66 __asm__ __volatile__( 85 __asm__ __volatile__( 100 __asm__ __volatile__( 114 __asm__ __volatile__("dmb" : : : "memory"); 120 __asm__ __volatile__( 189 __asm__ __volatile__( 211 __asm__ __volatile__( 227 __asm__ __volatile__( 245 __asm__ __volatile__( 263 __asm__ __volatile__ [all...] |
linux_syscall_support.h | 533 #define __SYS_REG(name) register long __sysreg __asm__("r6") = __NR_##name; 790 * at optimizing across __asm__ calls. 796 __asm__ __volatile__("push %%ebx\n" \ 809 __asm__ volatile("int $0x80" \ 851 __asm__ __volatile__("push %%ebx\n" \ 870 __asm__ __volatile__("push %%ebp\n" \ [all...] |
/external/chromium_org/base/third_party/valgrind/ |
valgrind.h | 99 use "__asm__"). */ 231 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 244 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 340 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 353 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 397 __asm__ volatile("mr 3,%1\n\t" /*default*/ \ 412 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 449 register unsigned long long int _zzq_result __asm__("r3"); \ 450 register unsigned long long int* _zzq_ptr __asm__("r4"); \ 458 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE [all...] |
/external/chromium_org/third_party/re2/util/ |
valgrind.h | 80 use "__asm__"). */ 208 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 221 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 262 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 275 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 319 __asm__ volatile("mr 3,%1\n\t" /*default*/ \ 334 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 371 register unsigned long long int _zzq_result __asm__("r3"); \ 372 register unsigned long long int* _zzq_ptr __asm__("r4"); \ 380 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE [all...] |
/external/regex-re2/util/ |
valgrind.h | 80 use "__asm__"). */ 208 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 221 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 262 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 275 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 319 __asm__ volatile("mr 3,%1\n\t" /*default*/ \ 334 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 371 register unsigned long long int _zzq_result __asm__("r3"); \ 372 register unsigned long long int* _zzq_ptr __asm__("r4"); \ 380 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE [all...] |
/external/valgrind/main/include/ |
valgrind.h | 99 use "__asm__"). */ 258 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 271 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 379 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 392 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 437 __asm__ volatile("mr 3,%1\n\t" /*default*/ \ 452 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 499 __asm__ volatile("mr 3,%1\n\t" /*default*/ \ 514 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 523 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE [all...] |
/external/valgrind/main/helgrind/tests/ |
annotate_hbefore.c | 32 __asm__ __volatile__ ( 43 __asm__ __volatile__( 65 __asm__ __volatile__ ( 76 __asm__ __volatile__( 96 __asm__ __volatile__( 119 __asm__ __volatile__( 147 __asm__ __volatile__ ( 157 __asm__ __volatile__( 178 __asm__ __volatile__ ( 198 __asm__ __volatile__ [all...] |
/external/valgrind/main/none/tests/amd64/ |
crc32.c | 45 __asm__ __volatile__( 54 __asm__ __volatile__( 63 __asm__ __volatile__( 72 __asm__ __volatile__( 83 __asm__ __volatile__( 92 __asm__ __volatile__( 101 __asm__ __volatile__( 110 __asm__ __volatile__( 184 __asm__ __volatile__( 193 __asm__ __volatile__ [all...] |
/external/chromium_org/third_party/tcmalloc/vendor/src/third_party/ |
valgrind.h | 80 use "__asm__"). */ 200 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 213 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 254 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 267 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 311 __asm__ volatile("mr 3,%1\n\t" /*default*/ \ 326 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ 363 register unsigned long long int _zzq_result __asm__("r3"); \ 364 register unsigned long long int* _zzq_ptr __asm__("r4"); \ 372 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE [all...] |
/external/libvpx/libvpx/vpx_ports/ |
x86.h | 39 __asm__ __volatile__ (\ 45 __asm__ __volatile__ (\ 154 __asm__ __volatile__("rdtsc\n\t":"=a"(tsc):); 172 __asm__ __volatile__ ("pause \n\t") 189 __asm__ __volatile__("fldcw %0" : : "m"(*&mode)); 194 __asm__ __volatile__("fstcw %0\n\t":"=m"(*&mode):);
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/external/speex/libspeex/ |
ltp_bfin.h | 40 __asm__ __volatile__ ( 69 __asm__ __volatile__ ( 115 __asm__ __volatile__ 183 __asm__ __volatile__ 224 __asm__ __volatile__ 325 __asm__ __volatile__
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/bionic/libc/kernel/arch-mips/asm/ |
mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) 475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0) 476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) 477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0) 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) 480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; }) 481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…) [all...] |
/development/ndk/platforms/android-9/arch-mips/include/asm/ |
mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) 475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0) 476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) 477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0) 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) 480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; }) 481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…) [all...] |
/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) 475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0) 476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) 477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0) 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) 480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; }) 481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…) [all...] |