| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; })
480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; })
481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…)
[all...] |
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; })
480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; })
481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…)
[all...] |
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; })
480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; })
481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…)
[all...] |
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| mipsregs.h | 474 #define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
476 #define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; })
477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; })
480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; })
481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : (…)
[all...] |
| /external/kernel-headers/original/asm-x86/ |
| tlbflush_32.h | 19 __asm__ __volatile__( \
34 __asm__ __volatile__( \
48 __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
|
| /external/libvorbis/lib/ |
| os.h | 98 __asm__ __volatile__("fnstcw %0\n\t"
107 __asm__ __volatile__("fldcw %0":: "m"(fpu));
115 __asm__("fistl %0": "=m"(i) : "t"(f));
|
| /external/oprofile/libop/ |
| op_hw_specific.h | 24 __asm__ __volatile__(
45 __asm__ __volatile__ (
105 __asm__ __volatile__ (
|
| /external/valgrind/main/none/tests/amd64/ |
| lzcnt64.c | 11 __asm__ __volatile__(
28 __asm__ __volatile__(
45 __asm__ __volatile__(
|
| ssse3_misaligned.c | 13 __asm__ __volatile__(
|
| /external/chromium_org/v8/src/third_party/valgrind/ |
| valgrind.h | 100 use "__asm__"). */
246 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
259 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
367 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
380 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
425 __asm__ volatile("mr 3,%1\n\t" /*default*/ \
440 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
478 register uint64_t _zzq_result __asm__("r3"); \
479 register uint64_t* _zzq_ptr __asm__("r4"); \
487 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE
[all...] |
| /external/v8/src/third_party/valgrind/ |
| valgrind.h | 100 use "__asm__"). */
246 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
259 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
367 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
380 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
425 __asm__ volatile("mr 3,%1\n\t" /*default*/ \
440 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
478 register uint64_t _zzq_result __asm__("r3"); \
479 register uint64_t* _zzq_ptr __asm__("r4"); \
487 __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE
[all...] |
| /bionic/libc/kernel/arch-arm/asm/ |
| byteorder.h | 30 __asm__ ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
|
| /development/ndk/platforms/android-3/arch-arm/include/asm/ |
| byteorder.h | 25 __asm__ ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
|
| /external/chromium_org/base/ |
| cpu.cc | 47 __asm__ volatile (
57 __asm__ volatile (
69 __asm__ volatile (
77 __asm__ volatile (
|
| /external/kernel-headers/original/asm-arm/ |
| domain.h | 57 __asm__ __volatile__( \
|
| /external/kernel-headers/original/asm-mips/ |
| hazards.h | 20 __asm__(".macro " #name "; " #code "; .endm"); \
24 __asm__ __volatile__ (#name); \
81 __asm__ __volatile__( \
126 __asm__ __volatile__( \
|
| system.h | 88 __asm__ __volatile__(
103 __asm__ __volatile__(
140 __asm__ __volatile__(
153 __asm__ __volatile__(
|
| /external/kernel-headers/original/asm-mips/sibyte/ |
| sb1250.h | 57 __asm__ __volatile__ ( \
|
| /external/speex/libspeex/ |
| fixed_arm4.h | 69 __asm__ __volatile__ (
|
| /external/valgrind/main/gdbserver_tests/ |
| clean_after_fork.c | 18 for (burn = 0; burn < 100000; burn++) /* burncpu */__asm__ __volatile("":::"memory") ;
|
| /external/valgrind/main/helgrind/tests/ |
| free_is_write.c | 37 __asm__ __volatile__("" : : "r"((long)c) );
|
| tc11_XCHG.c | 46 __asm__ __volatile__( \
53 __asm__ __volatile__( \
63 __asm__ __volatile__( \
79 __asm__ __volatile__( \
|
| /external/valgrind/main/memcheck/tests/ |
| err_disable1.c | 16 __asm__ __volatile__("" : : "r"(c) : "memory","cc");
|
| /external/valgrind/main/memcheck/tests/s390x/ |
| cs.c | 14 __asm__ volatile (
|
| csg.c | 14 __asm__ volatile (
|
