| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_atomic.h | 53 __asm__ __volatile__("lock; decl %0; sete %1":"+m"(*v), "=qm"(c)
62 __asm__ __volatile__("lock; incl %0":"+m"(*v));
68 __asm__ __volatile__("lock; decl %0":"+m"(*v));
100 __asm__ __volatile__("lock; decl %0; sete %1":"+m"(*v), "=qm"(c)
109 __asm__ __volatile__("lock; incl %0":"+m"(*v));
115 __asm__ __volatile__("lock; decl %0":"+m"(*v));
|
| /external/qemu/distrib/sdl-1.2.15/src/cpuinfo/ |
| SDL_cpuinfo.c | 60 __asm__ (
80 __asm__ (
150 __asm__ (
169 __asm__ (
230 __asm__ (
248 __asm__ (
|
| /external/valgrind/main/coregrind/ |
| m_libcassert.c | 52 __asm__ __volatile__( \
68 __asm__ __volatile__( \
83 __asm__ __volatile__( \
102 __asm__ __volatile__( \
121 __asm__ __volatile__( \
142 __asm__ __volatile__( \
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
162 #define mttgpr(rd,v) do { __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttgpr $1, " #rd " \n" " .word 0x41810020 | (" #rd " << 11) \n" " .set pop \n" : : "r" (v)); } while (0)
164 #define mttc0(rd, sel, v) ({ __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttc0 %0," #rd ", " #sel " \n" " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" " .set pop \n" : : "r" (v)); })
165 #define mttr(rd, u, sel, v) ({ __asm__ __volatile__( "mttr %0," #rd ", " #u ", " #sel : : "r" (v)); })
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
162 #define mttgpr(rd,v) do { __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttgpr $1, " #rd " \n" " .word 0x41810020 | (" #rd " << 11) \n" " .set pop \n" : : "r" (v)); } while (0)
164 #define mttc0(rd, sel, v) ({ __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttc0 %0," #rd ", " #sel " \n" " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" " .set pop \n" : : "r" (v)); })
165 #define mttr(rd, u, sel, v) ({ __asm__ __volatile__( "mttr %0," #rd ", " #u ", " #sel : : "r" (v)); })
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
162 #define mttgpr(rd,v) do { __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttgpr $1, " #rd " \n" " .word 0x41810020 | (" #rd " << 11) \n" " .set pop \n" : : "r" (v)); } while (0)
164 #define mttc0(rd, sel, v) ({ __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttc0 %0," #rd ", " #sel " \n" " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" " .set pop \n" : : "r" (v)); })
165 #define mttr(rd, u, sel, v) ({ __asm__ __volatile__( "mttr %0," #rd ", " #u ", " #sel : : "r" (v)); })
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
162 #define mttgpr(rd,v) do { __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttgpr $1, " #rd " \n" " .word 0x41810020 | (" #rd " << 11) \n" " .set pop \n" : : "r" (v)); } while (0)
164 #define mttc0(rd, sel, v) ({ __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttc0 %0," #rd ", " #sel " \n" " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" " .set pop \n" : : "r" (v)); })
165 #define mttr(rd, u, sel, v) ({ __asm__ __volatile__( "mttr %0," #rd ", " #u ", " #sel : : "r" (v)); })
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
162 #define mttgpr(rd,v) do { __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttgpr $1, " #rd " \n" " .word 0x41810020 | (" #rd " << 11) \n" " .set pop \n" : : "r" (v)); } while (0)
164 #define mttc0(rd, sel, v) ({ __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttc0 %0," #rd ", " #sel " \n" " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" " .set pop \n" : : "r" (v)); })
165 #define mttr(rd, u, sel, v) ({ __asm__ __volatile__( "mttr %0," #rd ", " #u ", " #sel : : "r" (v)); })
|
| /external/qemu/distrib/sdl-1.2.15/src/video/ |
| mmx.h | 72 __asm__ __volatile__ (
246 __asm__ __volatile__ ("movq %%" #reg ", %0" \
251 __asm__ __volatile__ (#op " %0, %%" #reg \
254 __asm__ __volatile__ ("movq %%" #reg ", %0" \
267 __asm__ __volatile__ ("movq %%" #reg ", %0" \
272 __asm__ __volatile__ (#op " %0, %%" #reg \
275 __asm__ __volatile__ ("movq %%" #reg ", %0" \
285 __asm__ __volatile__ ("movq %%" #reg ", %0" \
293 __asm__ __volatile__ (#op " %%" #reg ", %0" \
304 __asm__ __volatile__ ("movq %%" #regs ", %0"
[all...] |
| /external/chromium_org/native_client_sdk/src/libraries/third_party/pthreads-win32/ |
| implement.h | 773 __asm__ __volatile__ \
785 __asm__ __volatile__ \
796 __asm__ __volatile__ \
808 __asm__ __volatile__ \
820 __asm__ __volatile__ \
833 __asm__ __volatile__ \
845 __asm__ __volatile__ \
856 __asm__ __volatile__ \
868 __asm__ __volatile__ \
880 __asm__ __volatile__
[all...] |
| /external/libvpx/libvpx/vp8/common/mips/dspr2/ |
| idctllm_dspr2.c | 35 __asm__ __volatile__ (
219 __asm__ __volatile__ (
231 __asm__ __volatile__ (
241 __asm__ __volatile__ (
258 __asm__ __volatile__ (
266 __asm__ __volatile__ (
346 __asm__ __volatile__ (
|
| /external/chromium_org/third_party/mesa/src/src/mesa/main/ |
| compiler.h | 416 __asm__ ( "fnstcw %0" : "=m" (*&(x)) ); \
417 __asm__ ( "fldcw %0" : : "m" (mask) ); \
423 __asm__ ( "fnstcw %0" : "=m" (*&(x)) ); \
424 __asm__ ( "fldcw %0" : : "m" (mask) ); \
432 __asm__ ( "fnclex ; fldcw %0" : : "m" (*&(x)) ); \
|
| /external/kernel-headers/original/asm-x86/ |
| desc_32.h | 65 #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
66 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
71 #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
91 __asm__ __volatile__("lldt %w0"::"q" (0));
100 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
|
| io_32.h | 242 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
308 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
312 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
335 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
338 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
|
| /external/libffi/src/frv/ |
| ffi.c | 172 register ffi_closure *creg __asm__ ("gr7");
177 register char *frame_pointer __asm__ ("fp");
231 register void *return_struct_ptr __asm__("gr3");
259 register void *got __asm__("gr15");
288 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%2,%1)" :: "r" (tramp), "r" (i),
|
| /external/mesa3d/src/mesa/main/ |
| compiler.h | 416 __asm__ ( "fnstcw %0" : "=m" (*&(x)) ); \
417 __asm__ ( "fldcw %0" : : "m" (mask) ); \
423 __asm__ ( "fnstcw %0" : "=m" (*&(x)) ); \
424 __asm__ ( "fldcw %0" : : "m" (mask) ); \
432 __asm__ ( "fnclex ; fldcw %0" : : "m" (*&(x)) ); \
|
| /external/speex/libspeex/ |
| filters_bfin.h | 40 __asm__
63 __asm__ __volatile__
103 __asm__ __volatile__
238 __asm__ __volatile__
382 __asm__ __volatile__
|
| /external/valgrind/main/VEX/test/ |
| mmxtest.c | 60 __asm__ __volatile__ (
90 __asm__ __volatile__ ("movq %%" #reg ", %0" \
94 __asm__ __volatile__ (#op " %0, %%" #reg \
97 __asm__ __volatile__ ("movq %%" #reg ", %0" \
106 __asm__ __volatile__ ("movq %%" #reg ", %0" \
112 __asm__ __volatile__ (#op " %%" #reg ", %0" \
122 __asm__ __volatile__ ("movq %%" #regs ", %0" \
126 __asm__ __volatile__ ("movq %%" #regd ", %0" \
130 __asm__ __volatile__ (#op " %" #regs ", %" #regd); \
131 __asm__ __volatile__ ("movq %%" #regd ", %0"
[all...] |
| /dalvik/vm/ |
| Atomic.cpp | 59 __asm__ __volatile__ ("@ dvmQuasiAtomicSwap64\n"
89 __asm__ __volatile__ ("@ dvmQuasiAtomicCas64\n"
105 __asm__ __volatile__ ("@ dvmQuasiAtomicRead64\n"
|
| /external/chromium_org/base/ |
| atomicops_internals_arm_gcc.h | 71 __asm__ __volatile__(" ldrex %0, [%3]\n"
111 __asm__ __volatile__(" ldrex %0, [%3]\n"
139 __asm__ __volatile__(" ldrex %0, [%3]\n"
|
| /external/chromium_org/third_party/lzma_sdk/ |
| CpuArch.c | 29 __asm__ __volatile__ (
78 __asm__ __volatile__ (
90 __asm__ __volatile__ (
|
| /external/chromium_org/third_party/tcmalloc/chromium/src/ |
| malloc_hook_mmap_freebsd.h | 80 __asm__ __volatile__(
87 __asm__ __volatile__(
94 __asm__ __volatile__(
|
| /external/chromium_org/third_party/tcmalloc/vendor/src/ |
| malloc_hook_mmap_freebsd.h | 80 __asm__ __volatile__(
87 __asm__ __volatile__(
94 __asm__ __volatile__(
|
| /external/grub/netboot/ |
| pci.h | 92 __asm__ __volatile__("pushfl ; popl %0":"=g" (x): /* no input */ :"memory")
94 #define cli() __asm__ __volatile__ ("cli": : :"memory")
97 __asm__ __volatile__("pushl %0 ; popfl": /* no output */ :"g" (x):"memory")
|
| /external/stlport/src/ |
| lock_free_slist.h | 69 __asm__ __volatile__
91 __asm__ __volatile__
116 __asm__ __volatile__
|
