/external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
x86_64-mont.S | 25 leaq 2(%r9),%r10 27 negq %r10 28 leaq (%rsp,%r10,8),%rsp 43 movq %rax,%r10 46 imulq %r10,%rbp 50 addq %rax,%r10 64 movq %r10,%r11 75 movq %rdx,%r10 88 movq %r10,%r11 103 movq (%rsp),%r10 [all...] |
x86_64-mont5.S | 32 movq %r10,%r11 33 shrq $3,%r10 35 notq %r10 37 andq $3,%r10 39 movq 0(%rax,%r10,8),%xmm4 40 movq 8(%rax,%r10,8),%xmm5 41 movq 16(%rax,%r10,8),%xmm6 42 movq 24(%rax,%r10,8),%xmm7 73 movq %rax,%r10 81 imulq %r10,%rb [all...] |
/external/openssl/crypto/bn/asm/ |
x86_64-mont.S | 25 leaq 2(%r9),%r10 27 negq %r10 28 leaq (%rsp,%r10,8),%rsp 43 movq %rax,%r10 46 imulq %r10,%rbp 50 addq %rax,%r10 64 movq %r10,%r11 75 movq %rdx,%r10 88 movq %r10,%r11 103 movq (%rsp),%r10 [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_MUL_LONG.S | 29 umull r9, r10, r2, r0 @ r9/r10 <- ZxX 32 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX)) 40 stmia r0, {r9-r10} @ vAA/vAA+1<- r9/r10
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OP_INVOKE_DIRECT.S | 19 FETCH(r10, 2) @ r10<- GFED or CCCC 22 and r10, r10, #15 @ r10<- D (or stays CCCC) 26 GET_VREG(r9, r10) @ r9<- "this" ptr 37 * r10 = "this" register
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OP_INVOKE_VIRTUAL.S | 15 FETCH(r10, 2) @ r10<- GFED or CCCC 18 and r10, r10, #15 @ r10<- D (or stays CCCC) 35 * r10 = C or CCCC (index of first arg, which is the "this" ptr) 38 GET_VREG(r9, r10) @ r9<- "this" ptr
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OP_SGET.S | 14 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields 15 ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr 31 * r10: dvmDex->pResFields 36 add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
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OP_SPUT.S | 14 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields 15 ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr 32 * r10: dvmDex->pResFields 37 add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
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/dalvik/vm/compiler/template/armv5te/ |
TEMPLATE_STRING_COMPARETO.S | 26 ldr r10, [r1, #STRING_FIELDOFF_COUNT] 34 * count: r7/r10 37 * r10 <- minCount 39 subs r11, r7, r10 40 movls r10, r7 56 * r10: iteration count for comparison 62 subs r10, #2 77 cmp r10, #28 79 subs r10, #3 93 subs r10, # [all...] |
TEMPLATE_INVOKE_METHOD_PREDICTED_CHAIN.S | 36 ldr r10, [r7, #0] 39 ldreq r10, [r7, #0] 41 add r10, r10, #1 42 streq r10, [r7, #0]
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TEMPLATE_INVOKE_METHOD_NO_OPT.S | 14 SAVEAREA_FROM_FP(r10, r1) @ r10<- stack save area 15 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize) 16 cmp r10, r9 @ bottom < interpStackEnd? 20 ldr r10, [r0, #offMethod_accessFlags] @ r10<- methodToCall->accessFlags 32 tst r10, #ACC_NATIVE 39 ldr r10, .LdvmJitToInterpTraceSelectNoChai [all...] |
TEMPLATE_RETURN.S | 17 ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame 20 ldr r2, [r10, #(offStackSaveArea_method - sizeofStackSaveArea)] 34 mov rFP, r10 @ publish new FP 35 ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz 38 ldr r0, [r10, #offClassObject_pDvmDex] @ r0<- method->clazz->pDvmDex
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
convolve_opt.s | 43 LDRSH r10, [r4], #-2 @ *tmpH-- 45 MUL r8, r9, r10 51 LDRSH r10, [r4], #-2 @ *tmpH-- 54 MLA r8, r9, r10, r8 57 LDRSH r10, [r4], #-2 @ *tmpH-- 60 MLA r8, r9, r10, r8 78 LDRSH r10, [r4], #-2 82 MUL r8, r9, r10 90 LDRSH r10, [r4], #-2 @ *tmpH-- 93 MLA r8, r9, r10, r [all...] |
cor_h_vec_opt.s | 50 MOV r10, r0 @p1 = h 54 LDRSH r12, [r10], #2 62 LDRSH r12, [r10], #2 @*p1++ 67 ADD r10, r6, r14 70 MOV r6, r10, ASR #16 73 LDRSH r10, [r9], #2 @sign[pos] 75 MUL r12, r5, r10 81 LDRSH r10, [r7], #2 @*p0++ 85 ADD r5, r5, r10 95 MOV r10, r0 @p1 = [all...] |
Norm_Corr_opt.s | 78 LDR r10, [r14], #4 83 SMLABB r6, r10, r10, r6 84 SMLATT r6, r10, r10, r6 113 LDR r10, [r12], #4 @load xn[i], xn[i+1] 116 SMLABB r5, r10, r11, r5 @L_tmp += xn[i] * excf[i] 117 SMLATT r5, r10, r11, r5 @L_tmp += xn[i+1] * excf[i+1] 119 LDR r10, [r12], #4 @load xn[i+2], xn[i+3] 122 SMLABB r5, r10, r11, r [all...] |
syn_filt_opt.s | 51 LDRH r10, [r4], #2 60 STRH r10, [r5], #2 69 LDRH r10, [r4], #2 78 STRH r10, [r5], #2 96 ORR r10, r6, r7, LSL #16 @ -a[2] -- -a[1] 98 STR r10, [r13, #-4] 107 ORR r10, r6, r7, LSL #16 @ -a[6] -- -a[5] 109 STR r10, [r13, #-12] 118 ORR r10, r6, r7, LSL #16 @ -a[10] -- -a[9] 120 STR r10, [r13, #-20 [all...] |
/system/core/libpixelflinger/ |
col32cb16blend.S | 40 push {r4-r10, lr} // stack ARM regs 46 and r10, r1, #0xff // extract red 49 mov r10, r10, lsl #5 // prescale red 61 smlabb r6, r6, r5, r10 // dest red * alpha + src red 74 pop {r4-r10, pc} // return
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/external/libffi/src/x86/ |
unix64.S | 48 movq (%rsp), %r10 /* Load return address. */ 53 movq %r10, 24(%rax) /* Relocate return address. */ 56 movq %rdi, %r10 /* Save a copy of the register area. */ 61 movq (%r10), %rdi 62 movq 8(%r10), %rsi 63 movq 16(%r10), %rdx 64 movq 24(%r10), %rcx 65 movq 32(%r10), %r8 66 movq 40(%r10), %r9 72 leaq 176(%r10), %rs [all...] |
darwin64.S | 48 movq (%rsp), %r10 /* Load return address. */ 53 movq %r10, 24(%rax) /* Relocate return address. */ 56 movq %rdi, %r10 /* Save a copy of the register area. */ 61 movq (%r10), %rdi 62 movq 8(%r10), %rsi 63 movq 16(%r10), %rdx 64 movq 24(%r10), %rcx 65 movq 32(%r10), %r8 66 movq 40(%r10), %r9 72 leaq 176(%r10), %rs [all...] |
/frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
Radix4FFT_v5.s | 36 mov r10, r1 @ i = num@ 38 cmp r10, #0 49 str r10, [sp, #16] 58 ldrd r10, [r14, #0] @ r2 = xptr[0]@ r3 = xptr[1]@ 61 smulwt r4, r10, r8 @ L_mpy_wx(cosx, t0) 65 smulwb r5, r10, r8 @ L_mpy_wx(sinx, t0) 67 mov r10, r0, asr #2 @ t0 = r0 >> 2@ 73 sub r0, r10, r2 @ r0 = t0 - r2@ 76 add r2, r10, r2 @ r2 = t0 + r2@ 82 ldrd r10, [r14, #0] @ r4 = xptr[0]@ r5 = xptr[1] [all...] |
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.S | 31 LDR r10, .LarmVCM4P10_QPDivTable 32 P1: ADD r10, pc 36 LDRSB lr,[r10,r1] 37 LDR r10, =0x3020504 41 VDUP.32 d9,r10 51 LDRSH r10,[r8,#0] 57 VMOVNE.16 d0[0],r10 91 LDRSH r10,[r8,#0] 92 ADD r10,r10,#0x2 [all...] |
/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
cor_h_vec_neon.s | 51 MOV r10, r0 @p1 = h 55 LDRSH r12, [r10], #2 63 LDRSH r12, [r10], #2 @*p1++ 68 ADD r10, r6, r14 71 MOV r6, r10, ASR #16 74 LDRSH r10, [r9], #2 @sign[pos] 76 MUL r12, r5, r10 82 LDRSH r10, [r7], #2 @*p0++ 86 ADD r5, r5, r10 96 MOV r10, r0 @p1 = [all...] |
/external/libvpx/libvpx/vp8/common/arm/armv6/ |
dequant_idct_v6.asm | 67 smulwt r10, r4, r6 71 pkhbt r8, r8, r10, lsl #16 75 smulwb r10, r4, r12 79 pkhbt r10, r10, r7, lsl #16 82 uadd16 r6, r6, r10 83 uadd16 r10, r11, r14 85 uadd16 r9, r10, r6 86 usub16 r10, r10, r [all...] |
/external/tremolo/Tremolo/ |
mdctLARM.s | 187 LDMFD r12,{r8,r9,r10} @ r8 = step 189 @ r10= wR 197 LDRB r6, [r10,#-1]! @ r6 = *--wR 227 LDMFD r12,{r8,r9,r10} @ r8 = step 229 @ r10= wR 238 LDRB r6, [r10,#-1]! @ r6 = *--wR 322 LDRB r10,[r5],r2 @ r10= T[0] T += step 327 MUL r9, r6, r10 @ r9 = s0*T[0] 331 MUL r12,r7, r10 @ r12 = s2*T[0 [all...] |
/external/libvpx/libvpx/vp8/common/ppc/ |
recon_altivec.asm | 65 stvx v2, 0, r10 ;# 2 rows to dst from buf 66 lwz r0, 0(r10) 72 lwz r0, 4(r10) 74 lwz r0, 8(r10) 76 lwz r0, 12(r10) 95 la r10, -48(r1) ;# buf 110 stw r0, 0(r10) 112 stw r0, 4(r10) 114 stw r0, 8(r10) 116 stw r0, 12(r10) [all...] |