| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| mips3-mont.pl | 80 sll $num,3
|
| mips-mont.pl | 174 sll $num,`log($BNSZ)/log(2)`
|
| sparcv9-mont.pl | 92 sll $num,2,$num ! num*=4
|
| /external/openssl/crypto/bn/asm/ |
| mips3-mont.pl | 80 sll $num,3
|
| mips-mont.pl | 174 sll $num,`log($BNSZ)/log(2)`
|
| sparcv9-mont.pl | 92 sll $num,2,$num ! num*=4
|
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.h | 596 // sll(zero_reg, zero_reg, 0). We use rt_reg == at for non-zero
601 sll(zero_reg, nop_rt_reg, type, true);
664 // Please note: sll(zero_reg, zero_reg, x) instructions are reserved as nop
667 void sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop = false);
[all...] |
| deoptimizer-mips.cc | 517 __ sll(a1, a1, kPointerSizeLog2); // Count to offset.
|
| regexp-macro-assembler-mips.cc | 666 __ sll(t5, a1, (mode_ == UC16) ? 1 : 0);
[all...] |
| full-codegen-mips.cc | [all...] |
| assembler-mips.cc | 578 // Traditional mips nop == sll(zero_reg, zero_reg, 0)
579 // When marking non-zero type, use sll(zero_reg, at, type)
581 // of the sll instruction.
584 bool ret = (opcode == SPECIAL && function == SLL &&
1287 void Assembler::sll(Register rd, function in class:v8::Assembler
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.h | 666 sll(zero_reg, zero_reg, type, true);
729 // Please note: sll(zero_reg, zero_reg, x) instructions are reserved as nop
732 void sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop = false);
[all...] |
| deoptimizer-mips.cc | [all...] |
| full-codegen-mips.cc | [all...] |
| regexp-macro-assembler-mips.cc | 671 __ sll(t5, a1, (mode_ == UC16) ? 1 : 0);
[all...] |
| assembler-mips.cc | 586 // nop(type) == sll(zero_reg, zero_reg, type);
590 bool ret = (opcode == SLL &&
1280 void Assembler::sll(Register rd, function in class:v8::Assembler
[all...] |
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | [all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-mips.S | 119 #define GOTO_OPCODE(rd) sll rd, rd, 7; \
123 #define GOTO_OPCODE_BASE(_base, rd) sll rd, rd, 7; \
135 sll dst, dst, 7; \
137 sll t8, rix, 2; \
171 sll AT, roff, rshift; \
784 sll a1, rINST, 16 # a1 <- Bxxx0000
814 sll a1, a1, 16
827 sll a0, a0, 16 # a0 <- BBBB0000
857 sll a2, a2, 16
874 sll a1, 16
[all...] |
| /external/llvm/test/MC/SystemZ/ |
| insn-bad.s | [all...] |
| insn-good.s | [all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/ |
| aes-mips.pl | 64 $PTR_SLL="sll";
1009 sll $i0,24
1010 sll $i1,16
1011 sll $i2,8
1132 sll $at,$cnt,4
1161 sll $cnt,2
[all...] |
| /external/openssl/crypto/aes/asm/ |
| aes-mips.pl | 64 $PTR_SLL="sll";
1009 sll $i0,24
1010 sll $i1,16
1011 sll $i2,8
1132 sll $at,$cnt,4
1161 sll $cnt,2
[all...] |
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | 428 sll $t0, $t0, 3 # shift the frame size left 3 to align to 16 bytes
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips.cc | 149 __ sll(v0, v0, 11); // 0x91a2b000
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 159 __ sll(v0, v0, 11); // 0x91a2b000
[all...] |
