| /external/openssl/crypto/bn/asm/ |
| armv4-mont.S | 122 teq r4,r0 @ preserve carry
|
| armv4-mont.pl | 176 teq $tp,$num @ preserve carry
|
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
| sha512-armv4.pl | 126 teq $t0,#$magic
423 teq $inp,$len
563 teq $inp,$len
|
| sha512-armv4.S | 182 teq r9,#148
319 teq r9,#23
428 teq r1,r2
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-armv4.pl | 126 teq $t0,#$magic
423 teq $inp,$len
563 teq $inp,$len
|
| sha512-armv4.S | 182 teq r9,#148
319 teq r9,#23
428 teq r1,r2
[all...] |
| /external/chromium_org/v8/src/mips/ |
| disasm-mips.cc | 297 case TEQ:
748 case TEQ:
749 Format(instr, "teq 'rs, 'rt, code: 'code");
|
| assembler-mips.h | 702 void teq(Register rs, Register rt, uint16_t code);
[all...] |
| assembler-mips.cc | 1529 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 297 case TEQ:
735 case TEQ:
736 Format(instr, "teq 'rs, 'rt, code: 'code");
|
| assembler-mips.h | 767 void teq(Register rs, Register rt, uint16_t code);
[all...] |
| assembler-mips.cc | 1522 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
[all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.stdout.exp | [all...] |
| /external/chromium_org/v8/src/arm/ |
| disasm-arm.cc | 927 case TEQ: {
929 Format(instr, "teq'cond 'rn, 'shift_op");
[all...] |
| assembler-arm.h | 883 void teq(Register src1, const Operand& src2, Condition cond = al);
[all...] |
| assembler-arm.cc | 1349 void Assembler::teq(Register src1, const Operand& src2, Condition cond) { function in class:v8::internal::Assembler
[all...] |
| lithium-codegen-arm.cc | [all...] |
| /external/v8/test/cctest/ |
| test-assembler-arm.cc | 100 __ teq(r1, Operand(0, RelocInfo::NONE));
137 __ teq(r1, Operand(0, RelocInfo::NONE));
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb2-instructions.s | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.h | 241 void teq(Register rn, ShifterOperand so, Condition cond = AL);
|
| assembler_arm.cc | 331 void ArmAssembler::teq(Register rn, ShifterOperand so, Condition cond) { function in class:art::arm::ArmAssembler
332 CHECK_NE(rn, PC); // Reserve teq pc instruction for exception handler marker.
333 EmitType01(cond, so.type(), TEQ, 1, rn, R0, so);
[all...] |
| /external/v8/src/arm/ |
| stub-cache-arm.cc | [all...] |
| assembler-arm.h | 823 void teq(Register src1, const Operand& src2, Condition cond = al);
[all...] |
| assembler-arm.cc | [all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm.cc | 92 __ teq(r1, Operand::Zero());
130 __ teq(r1, Operand::Zero());
[all...] |
