| /external/llvm/lib/Target/Hexagon/ |
| HexagonFixupHwLoops.cpp | 64 MachineBasicBlock::iterator &MII,
129 MachineBasicBlock::iterator MII = MBB->begin();
130 while (MII != MIE) {
131 if (isHardwareLoop(MII)) {
132 RS.forward(MII);
133 assert(MII->getOperand(0).isMBB() &&
135 int Sub = InstOffset - BlockToInstOffset[MII->getOperand(0).getMBB()];
139 convertLoopInstr(MF, MII, RS);
140 MII = MBB->erase(MII);
[all...] |
| HexagonSplitConst32AndConst64.cpp | 79 MachineBasicBlock::iterator MII = MBB->begin();
81 while (MII != MIE) {
82 MachineInstr *MI = MII;
88 BuildMI (*MBB, MII, MI->getDebugLoc(),
90 BuildMI (*MBB, MII, MI->getDebugLoc(),
94 MII = MBB->erase (MI);
101 BuildMI (*MBB, MII, MI->getDebugLoc(),
103 BuildMI (*MBB, MII, MI->getDebugLoc(),
107 MII = MBB->erase (MI);
114 BuildMI (*MBB, MII, MI->getDebugLoc()
[all...] |
| HexagonExpandPredSpillCode.cpp | 82 for (MachineBasicBlock::iterator MII = MBB->begin(); MII != MBB->end();
83 ++MII) {
84 MachineInstr *MI = MII;
98 BuildMI(*MBB, MII, MI->getDebugLoc(),
101 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_rr),
104 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd),
106 BuildMI(*MBB, MII, MI->getDebugLoc(),
111 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_ri),
113 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd)
[all...] |
| HexagonSplitTFRCondSets.cpp | 89 for (MachineBasicBlock::iterator MII = MBB->begin(); MII != MBB->end();
90 ++MII) {
91 MachineInstr *MI = MII;
114 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1),
118 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc2),
121 MII = MBB->erase(MI);
122 --MII;
133 BuildMI(*MBB, MII, MI->getDebugLoc(),
138 BuildMI(*MBB, MII, MI->getDebugLoc()
[all...] |
| HexagonAsmPrinter.cpp | 204 MachineBasicBlock::const_instr_iterator MII = MI;
205 ++MII;
207 while (MII != MBB->end() && MII->isInsideBundle()) {
208 const MachineInstr *MInst = MII;
212 ++MII;
215 //BundleMIs.push_back(&*MII);
217 ++MII;
300 const MCInstrInfo &MII,
304 return(new HexagonInstPrinter(MAI, MII, MRI))
[all...] |
| HexagonNewValueJump.cpp | 173 MachineBasicBlock::iterator MII) {
176 if (MII->getDesc().mayStore())
180 if (MII->getOpcode() == Hexagon::CALLv3)
194 if (MII->getOpcode() == TargetOpcode::KILL ||
195 MII->getOpcode() == TargetOpcode::PHI ||
196 MII->getOpcode() == TargetOpcode::COPY)
203 if (MII->getOpcode() == Hexagon::TFR_condset_rr ||
204 MII->getOpcode() == Hexagon::TFR_condset_ii ||
205 MII->getOpcode() == Hexagon::TFR_condset_ri ||
206 MII->getOpcode() == Hexagon::TFR_condset_ir |
[all...] |
| /external/chromium_org/ui/views/controls/menu/ |
| menu_win.cc | 52 MENUITEMINFO mii = {0}; local
53 mii.cbSize = sizeof(mii);
54 mii.fMask = MIIM_ID;
55 GetMenuItemInfo(hMenu, pos, TRUE, &mii);
56 return mii.wID;
284 MENUITEMINFO mii; local
285 mii.cbSize = sizeof(mii);
286 mii.fMask = MIIM_FTYPE
302 MENUITEMINFO mii = {0}; local
324 MENUITEMINFO mii; local
416 MENUITEMINFO mii; local
485 MENUITEMINFO mii; local
515 MENUITEMINFO mii; local
[all...] |
| native_menu_win.cc | 128 MENUITEMINFO mii = {0}; local
129 mii.cbSize = sizeof(mii);
130 mii.fMask = MIIM_ID;
131 GetMenuItemInfo(menu, i, MF_BYPOSITION, &mii);
132 if (mii.wID == w_param)
613 MENUITEMINFO mii = {0}; local
614 mii.cbSize = sizeof(mii);
615 mii.fMask = MIIM_FTYPE
621 MENUITEMINFO mii = {0}; local
652 MENUITEMINFO mii = {0}; local
673 MENUITEMINFO mii = {0}; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.h | 13 AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
15 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.h | 13 AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
15 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/wpa_supplicant_8/src/drivers/ |
| driver_roboswitch.c | 13 #include <linux/mii.h>
22 /* MII access registers */
23 #define ROBO_MII_PAGE 0x10 /* MII page register */
24 #define ROBO_MII_ADDR 0x11 /* MII address register */
25 #define ROBO_MII_DATA_OFFSET 0x18 /* Start of MII data registers */
27 #define ROBO_MII_PAGE_ENABLE 0x01 /* MII page op code */
28 #define ROBO_MII_ADDR_WRITE 0x01 /* MII address write op code */
29 #define ROBO_MII_ADDR_READ 0x02 /* MII address read op code */
30 #define ROBO_MII_DATA_MAX 4 /* Consecutive MII data registers */
66 /* Copied from the kernel-only part of mii.h. *
88 struct mii_ioctl_data *mii = if_mii(&drv->ifr); local
104 struct mii_ioctl_data *mii = if_mii(&drv->ifr); local
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 43 for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
44 MIE = MBB->instr_end(); MII != MIE; ) {
45 MachineInstr *MI = &*MII;
50 while (++MII != MIE && MII->isBundledWithPred()) {
51 MII->unbundleFromPred();
52 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
53 MachineOperand &MO = MII->getOperand(i);
64 ++MII;
227 MachineBasicBlock::instr_iterator MII = MBB.instr_begin()
[all...] |
| /external/llvm/lib/Target/Hexagon/InstPrinter/ |
| HexagonInstPrinter.h | 26 const MCInstrInfo &MII,
28 : MCInstPrinter(MAI, MII, MRI), MII(MII) {}
71 return MII;
81 const MCInstrInfo &MII;
|
| /external/chromium_org/content/shell/ |
| shell_web_contents_view_delegate_win.cc | 44 MENUITEMINFO mii = {0}; local
45 mii.cbSize = sizeof(mii);
46 mii.fMask = MIIM_FTYPE | MIIM_ID | MIIM_DATA | MIIM_STRING | MIIM_STATE;
47 mii.fState = enabled ? MFS_ENABLED : (MF_DISABLED | MFS_GRAYED);
48 mii.fType = MFT_STRING;
49 mii.wID = id;
50 mii.dwTypeData = text;
52 InsertMenuItem(menu, menu_index, TRUE, &mii);
|
| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| ia64.S | 175 { .mii; alloc r2=ar.pfs,4,12,0,16
189 { .mii; ADDP r15=0,r33 // ap
196 { .mii; (p16) ld8 r32=[r16],8 // b=*(bp++)
202 { .mii; (p16) ld8 r35=[r15],8 // a=*(ap++)
210 { .mii;
228 { .mii; alloc r2=ar.pfs,4,12,0,16
242 { .mii; ADDP r15=0,r33 // ap
249 { .mii; (p16) ld8 r32=[r16],8 // b=*(bp++)
255 { .mii; (p16) ld8 r35=[r15],8 // a=*(ap++)
263 { .mii;
[all...] |
| ia64-mont.pl | 306 { .mii; nop.m 0
310 { .mii; nop.m 0
341 { .mii; or nptr=aptr,bptr
506 { .mii; (p17) getf.sig a7=alo[8] // 1:
515 { .mii; (p17) getf.sig n5=nlo[6] // 3:
535 { .mii; (p17) getf.sig n6=nlo[7] // 7:
546 { .mii; (p16) getf.sig a1=alo[1] // 9:
555 { .mii; (p17) getf.sig n7=nlo[8] // 11:
566 { .mii; (p16) getf.sig a2=alo[2] // 13:
575 { .mii; (p16) nop.m 0 // 15
[all...] |
| /external/openssl/crypto/bn/asm/ |
| ia64.S | 175 { .mii; alloc r2=ar.pfs,4,12,0,16
189 { .mii; ADDP r15=0,r33 // ap
196 { .mii; (p16) ld8 r32=[r16],8 // b=*(bp++)
202 { .mii; (p16) ld8 r35=[r15],8 // a=*(ap++)
210 { .mii;
228 { .mii; alloc r2=ar.pfs,4,12,0,16
242 { .mii; ADDP r15=0,r33 // ap
249 { .mii; (p16) ld8 r32=[r16],8 // b=*(bp++)
255 { .mii; (p16) ld8 r35=[r15],8 // a=*(ap++)
263 { .mii;
[all...] |
| ia64-mont.pl | 306 { .mii; nop.m 0
310 { .mii; nop.m 0
341 { .mii; or nptr=aptr,bptr
506 { .mii; (p17) getf.sig a7=alo[8] // 1:
515 { .mii; (p17) getf.sig n5=nlo[6] // 3:
535 { .mii; (p17) getf.sig n6=nlo[7] // 7:
546 { .mii; (p16) getf.sig a1=alo[1] // 9:
555 { .mii; (p17) getf.sig n7=nlo[8] // 11:
566 { .mii; (p16) getf.sig a2=alo[2] // 13:
575 { .mii; (p16) nop.m 0 // 15
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstPrinter.h | 40 const MCInstrInfo &MII;
58 MCInstPrinter(const MCAsmInfo &mai, const MCInstrInfo &mii,
60 : CommentStream(0), MAI(mai), MII(mii), MRI(mri), AvailableFeatures(0),
|
| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.h | 24 MSP430InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26 : MCInstPrinter(MAI, MII, MRI) {}
|
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
| sha512-ia64.pl | 170 { .mii; and r8=7,input
209 { .mii; or $t1=$t1,E
275 { .mii; $LDW T1=[input]
278 { .mii; shrp X[ 6]=X[ 6],X[ 5],56
280 { .mii; shrp X[ 4]=X[ 4],X[ 3],56
282 { .mii; shrp X[ 2]=X[ 2],X[ 1],56
305 { .mii; $LDW T1=[input]
308 { .mii; shrp X[ 7]=X[ 7],X[ 6],48
310 { .mii; shrp X[ 5]=X[ 5],X[ 4],48
312 { .mii; shrp X[ 3]=X[ 3],X[ 2],4
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-ia64.pl | 170 { .mii; and r8=7,input
209 { .mii; or $t1=$t1,E
275 { .mii; $LDW T1=[input]
278 { .mii; shrp X[ 6]=X[ 6],X[ 5],56
280 { .mii; shrp X[ 4]=X[ 4],X[ 3],56
282 { .mii; shrp X[ 2]=X[ 2],X[ 1],56
305 { .mii; $LDW T1=[input]
308 { .mii; shrp X[ 7]=X[ 7],X[ 6],48
310 { .mii; shrp X[ 5]=X[ 5],X[ 4],48
312 { .mii; shrp X[ 3]=X[ 3],X[ 2],4
[all...] |
| /external/grub/netboot/ |
| sis900.h | 223 /* MII register offsets */
234 /* mii registers specific to SiS 900 */
242 /* mii registers specific to AMD 79C901 */
247 /* mii registers specific to ICS 1893 */
255 /* MII Control register bit definitions. */
267 /* MII Status register bit */
286 /* MII NWAY Register Bits ...
|
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 314 MachineBasicBlock::iterator MII = MI;
315 MII = llvm::prior(MII);
316 MachineInstr &MI2 = *MII;
317 MII = llvm::prior(MII);
318 MachineInstr &MI1 = *MII;
334 MachineBasicBlock::reverse_iterator MII = MBB.rbegin(), E = MBB.rend();
335 while (MII != E) {
336 MachineInstr *MI = &*MII;
[all...] |
| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.h | 69 llvm::OwningPtr<const llvm::MCInstrInfo> MII;
88 const MCInstrInfo *mII,
97 MII.reset(mII);
112 const MCInstrInfo *getInstrInfo() const { return MII.get(); }
|
