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    Searched full:res10 (Results 1 - 9 of 9) sorted by null

/external/clang/test/SemaOpenCL/
vec_step.cl	25 int res10[vec_step(int8) == 8 ? 1 : -1];
/external/llvm/test/CodeGen/R600/
llvm.SI.imageload.ll	37 %res10 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v10, 55 %t10 = extractelement <4 x i32> %res10, i32 2 56 %t11 = extractelement <4 x i32> %res10, i32 3
llvm.AMDGPU.tex.ll	31 %res10 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res9, i32 0, i32 0, i32 10) 32 %res11 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res10, i32 0, i32 0, i32 11)
llvm.SI.resinfo.ll	31 %res10 = call <4 x i32> @llvm.SI.resinfo(i32 %a10, <8 x i32> undef, i32 10) 57 %t10 = extractelement <4 x i32> %res10, i32 2 58 %t11 = extractelement <4 x i32> %res10, i32 3
llvm.SI.sample.ll	55 %res10 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v10, 88 %t10 = extractelement <4 x float> %res10, i32 2 89 %t11 = extractelement <4 x float> %res10, i32 3
llvm.SI.sampled.ll	55 %res10 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v10, 88 %t10 = extractelement <4 x float> %res10, i32 2 89 %t11 = extractelement <4 x float> %res10, i32 3
fetch-limits.r700+.ll	48 %res10 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %10, i32 0, i32 0, i32 1) 60 %f = fadd <4 x float> %res10, %res11
/external/clang/test/SemaCXX/
altivec.cpp	29 int res10[vec_step(vi) == 4 ? 1 : -1]; local
/external/libvpx/libvpx/vp9/encoder/x86/
vp9_dct_sse2.c	1115 __m128i res08, res09, res10, res11, res12, res13, res14, res15; local     [all...]

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