| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrNEON.td | [all...] |
| /external/kernel-headers/original/asm-mips/sn/sn0/ |
| hubmd.h | 103 * MD_SIZE_xxx are useful for representing the size of a SIMM or bank
104 * (SIMM pair). They correspond to the values needed for the bit
294 * Premium SIMM directory entry shifts and masks. Each is valid only in the
344 * Standard SIMM directory entry shifts and masks. Each is valid only in the
391 /* Premium SIMM protection entry shifts and masks. */
404 /* Standard SIMM protection entry shifts and masks. */
525 /* for Premium SIMM */
532 /* for Standard SIMM */
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrNEON.td | [all...] |
| ARMInstrFormats.td | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrAltivec.td | 572 def VSPLTISB : VXForm_3<780, (outs vrrc:$vD), (ins s5imm:$SIMM),
573 "vspltisb $vD, $SIMM", VecPerm,
574 [(set v16i8:$vD, (v16i8 vecspltisb:$SIMM))]>;
575 def VSPLTISH : VXForm_3<844, (outs vrrc:$vD), (ins s5imm:$SIMM),
576 "vspltish $vD, $SIMM", VecPerm,
577 [(set v8i16:$vD, (v8i16 vecspltish:$SIMM))]>;
578 def VSPLTISW : VXForm_3<908, (outs vrrc:$vD), (ins s5imm:$SIMM),
579 "vspltisw $vD, $SIMM", VecPerm,
580 [(set v4i32:$vD, (v4i32 vecspltisw:$SIMM))]>;
[all...] |
| PPCISelDAGToDAG.cpp | 510 short SImm;
511 if (isIntS16Immediate(RHS, SImm))
513 getI32Imm((int)SImm & 0xFFFF)),
553 short SImm;
554 if (isIntS16Immediate(RHS, SImm))
556 getI64Imm(SImm & 0xFFFF)),
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 226 int64_t SImm = scale * ((UImm & ~Sign) - Sign);
228 O << "#" << SImm;
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/libyasm/ |
| insn.c | 222 fprintf(f, "%*sImm=", indent_level, "");
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 454 int32_t SImm = MO1.getImm();
458 if (SImm == INT32_MIN) {
459 SImm = 0;
464 if (SImm < 0) {
465 SImm = -SImm;
469 Imm = SImm;
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_arm_isel.c | 691 Int simm = (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; local
692 if (simm >= -4095 && simm <= 4095) {
695 simm = -simm;
697 return ARMAMode1_RI(reg, simm);
757 Int simm = (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; local
758 if (simm >= -255 && simm <= 255) {
761 simm = -simm
809 Int simm = (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; local
[all...] |
| host_x86_isel.c | [all...] |
| guest_ppc_toIR.c | [all...] |
| /external/qemu/ |
| ppc-dis.c | 837 /* The SIMM field in a VX form instruction. */
838 #define SIMM VD + 1
842 #define UIMM SIMM + 1
[all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
| gen_x86_insn.py | [all...] |
