| /external/llvm/test/CodeGen/ARM/ |
| 2011-02-04-AntidepMultidef.ll | 2 ; rdar://8959122 illegal register operands for UMULL instruction
4 ; Armv6 generates a umull that must write to two distinct destination regs.
25 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
28 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
39 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
42 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
53 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
56 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
67 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
70 ; CHECK: umull [[REGISTER:lr|r[0-9]+]]
[all...] |
| mulhi.ll | 24 ; V6: umull
27 ; V4: umull
30 ; M3: umull
|
| 2011-04-26-SchedTweak.ll | 3 ; Do not move the umull above previous call which would require use of
40 ; CHECK-NOT: umull
42 ; CHECK: umull
|
| long.ll | 76 ; CHECK: umull
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ldrd.ll | 8 ; CHECK: umull
|
| thumb2-mulhi.ll | 16 ; CHECK: umull r1, r0, r1, r0
|
| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| ppc.pl | 114 $UMULL= "mullw"; # unsigned multiply low
138 $UMULL= "mulld"; # unsigned multiply low
288 $UMULL r9,r5,r5
297 $UMULL r7,r5,r6
311 $UMULL r7,r6,r6
318 $UMULL r7,r5,r6
331 $UMULL r7,r5,r6
343 $UMULL r7,r5,r6
354 $UMULL r7,r6,r6
361 $UMULL r7,r5,r
[all...] |
| ppc-mont.pl | 42 $UMULL= "mullw"; # unsigned multiply low
62 $UMULL= "mulld"; # unsigned multiply low
155 $UMULL $lo0,$aj,$m0 ; ap[0]*bp[0]
161 $UMULL $m1,$lo0,$n0 ; "tp[0]"*n0
163 $UMULL $alo,$aj,$m0 ; ap[1]*bp[0]
166 $UMULL $lo1,$nj,$m1 ; np[0]*m1
172 $UMULL $nlo,$nj,$m1 ; np[1]*m1
183 $UMULL $alo,$aj,$m0 ; ap[j]*bp[0]
187 $UMULL $nlo,$nj,$m1 ; np[j]*m1
219 $UMULL $lo0,$aj,$m0 ; ap[0]*bp[i
[all...] |
| armv4-mont.pl | 18 # base and compiler generated code with in-lined umull and even umlal
85 umull $alo,$ahi,$aj,$bi @ ap[0]*bp[0]
|
| armv4-mont.S | 31 umull r10,r11,r5,r2 @ ap[0]*bp[0]
|
| /external/openssl/crypto/bn/asm/ |
| ppc.pl | 114 $UMULL= "mullw"; # unsigned multiply low
138 $UMULL= "mulld"; # unsigned multiply low
288 $UMULL r9,r5,r5
297 $UMULL r7,r5,r6
311 $UMULL r7,r6,r6
318 $UMULL r7,r5,r6
331 $UMULL r7,r5,r6
343 $UMULL r7,r5,r6
354 $UMULL r7,r6,r6
361 $UMULL r7,r5,r
[all...] |
| ppc-mont.pl | 42 $UMULL= "mullw"; # unsigned multiply low
62 $UMULL= "mulld"; # unsigned multiply low
155 $UMULL $lo0,$aj,$m0 ; ap[0]*bp[0]
161 $UMULL $m1,$lo0,$n0 ; "tp[0]"*n0
163 $UMULL $alo,$aj,$m0 ; ap[1]*bp[0]
166 $UMULL $lo1,$nj,$m1 ; np[0]*m1
172 $UMULL $nlo,$nj,$m1 ; np[1]*m1
183 $UMULL $alo,$aj,$m0 ; ap[j]*bp[0]
187 $UMULL $nlo,$nj,$m1 ; np[j]*m1
219 $UMULL $lo0,$aj,$m0 ; ap[0]*bp[i
[all...] |
| armv4-mont.pl | 18 # base and compiler generated code with in-lined umull and even umlal
85 umull $alo,$ahi,$aj,$bi @ ap[0]*bp[0]
|
| armv4-mont.S | 31 umull r10,r11,r5,r2 @ ap[0]*bp[0]
|
| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_MUL_LONG.S | 23 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
|
| /frameworks/native/opengl/libagl/ |
| iterators.S | 76 umull r6, r5, r3, r6
77 umull r8, r0, r4, r8
|
| /dalvik/vm/mterp/armv5te/ |
| OP_MUL_LONG_2ADDR.S | 19 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
|
| OP_MUL_LONG.S | 29 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_MUL_LONG_2ADDR.S | 18 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
|
| /external/tremolo/Tremolo/ |
| asm_arm.h | 164 "umull %0,r2,r1,%0;" //qi*=labs(ilsp[j]-wi)
168 "umull %1,r3,r1,%1;" //pi*=labs(ilsp[j+1]-wi)
191 "umull %0,r2,r1,%0;\n" //qi*=labs(ilsp[j]-wi)
192 "umull %1,r3,r0,%1;\n" //pi*=labs(ilsp[j+1]-wi)
|
| /sdk/emulator/qtools/ |
| opcode.cpp | 162 "umull",
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssemblerProxy.cpp | 172 void ARMAssemblerProxy::UMULL(int cc, int s,
174 mTarget->UMULL(cc, s, RdLo, RdHi, Rm, Rs);
|
| ARMAssembler.h | 97 virtual void UMULL(int cc, int s,
|
| ARMAssemblerProxy.h | 86 virtual void UMULL(int cc, int s,
|
| /external/llvm/test/CodeGen/AArch64/ |
| dp-3source.ll | 141 ; CHECK: umull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
|
