Lines Matching refs:LowOp
53 LowOp* lirTable[200];
175 lowOpTimeStamp++; //one LowOp constructed
252 //!update fields of LowOp and generate a x86 instruction with a single immediate operand
270 //!update fields of LowOp and generate a x86 instruction that takes a single memory operand
291 //!update fields of LowOp and generate a x86 instruction that takes a single reg operand
333 //!update fields of LowOp and generate a x86 instruction that takes two reg operands
346 //!update fields of LowOp and generate a x86 instruction that takes two reg operands
363 //!update fields of LowOp and generate a x86 instruction that takes two reg operands
384 //!update fields of LowOp and generate a x86 instruction that takes two reg operands
439 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
448 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
464 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
490 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
510 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
531 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one reg operand
563 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
608 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
642 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
658 //!update fields of LowOp and generate a x86 instruction that takes one reg operand and one mem operand
678 //!update fields of LowOp and generate a x86 instruction that takes one immediate and one reg operand
691 //!update fields of LowOp and generate a x86 instruction that takes one immediate and one reg operand
705 //!update fields of LowOp and generate a x86 instruction that takes one immediate and one mem operand
721 //!update fields of LowOp and generate a x86 instruction that takes one immediate and one mem operand
743 //!update fields of LowOp and generate a x86 instruction that uses the FP stack and takes one mem operand
764 //!update fields of LowOp and generate a x86 instruction that uses the FP stack and takes one mem operand
789 //LowOp same as EncoderBase destination first
839 void load_fp_stack(LowOp* op, OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fld(s|l)
859 void store_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fst(p)(s|l)
866 void store_int_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical) {//fist(p)(l)
873 void compare_reg_mem(LowOp* op, OpndSize size, int reg, bool isPhysical,
1145 void compare_ss_mem_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical,
1154 void compare_ss_reg_with_reg(LowOp* op, int reg1, bool isPhysical1,
1162 void compare_sd_mem_with_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical,
1171 void compare_sd_reg_with_reg(LowOp* op, int reg1, bool isPhysical1,
1188 LowOp* lower_return() {
1223 void alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhysical) {
1395 void fpu_mem(LowOp* op, ALU_Opcode opc, OpndSize size, int disp, int base_reg, bool isBasePhysical) {
1521 void moves_mem_to_reg(LowOp* op, OpndSize size,
1625 void set_VR_to_imm_noupdateref(LowOp* op, u2 vA, OpndSize size, int imm) {
1670 void move_ss_mem_to_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical,
1678 void move_ss_reg_to_mem(LowOp* op, int reg, bool isPhysical,
1692 void move_sd_reg_to_mem(LowOp* op, int reg, bool isPhysical,
