Home | History | Annotate | Download | only in arm

Lines Matching refs:shift_op

343 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) {
345   ASSERT(shift_op != ROR || shift_imm != 0);  // use RRX if you mean it
348   shift_op_ = shift_op;
350   if (shift_op == RRX) {
359 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) {
360   ASSERT(shift_op != RRX);
363   shift_op_ = shift_op;
386                        ShiftOp shift_op, int shift_imm, AddrMode am) {
390   shift_op_ = shift_op;
1622   ASSERT(src2.shift_op() == LSL);
1641   ASSERT(src2.shift_op() == ASR);
1662   ASSERT(src.shift_op() == ROR);
1684   ASSERT(src2.shift_op() == ROR);
1704   ASSERT(src.shift_op() == ROR);