Lines Matching refs:src3
316 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
318 ASSERT(!src2.is(src3));
319 ASSERT(!src1.is(src3));
321 if (src2.code() > src3.code()) {
322 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
325 str(src3, MemOperand(sp, 4, NegPreIndex), cond);
329 Push(src2, src3, cond);
336 Register src3,
340 ASSERT(!src2.is(src3));
341 ASSERT(!src1.is(src3));
344 ASSERT(!src3.is(src4));
346 if (src2.code() > src3.code()) {
347 if (src3.code() > src4.code()) {
350 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
353 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
358 Push(src3, src4, cond);
362 Push(src2, src3, src4, cond);
378 void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
380 ASSERT(!src2.is(src3));
381 ASSERT(!src1.is(src3));
383 if (src2.code() > src3.code()) {
384 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
386 ldr(src3, MemOperand(sp, 4, PostIndex), cond);
390 Pop(src2, src3, cond);
398 Register src3,
402 ASSERT(!src2.is(src3));
403 ASSERT(!src1.is(src3));
406 ASSERT(!src3.is(src4));
408 if (src2.code() > src3.code()) {
409 if (src3.code() > src4.code()) {
412 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
416 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
419 Pop(src3, src4, cond);
423 Pop(src2, src3, src4, cond);
