Lines Matching refs:Case
231 case llvm::Triple::x86:
232 case llvm::Triple::x86_64:
263 case llvm::Triple::x86:
264 case llvm::Triple::x86_64:
267 case llvm::Triple::mips:
268 case llvm::Triple::mipsel:
269 case llvm::Triple::ppc:
270 case llvm::Triple::ppc64:
271 case llvm::Triple::ppc64le:
274 case llvm::Triple::arm:
374 case llvm::Triple::x86:
375 case llvm::Triple::x86_64:
376 case llvm::Triple::arm:
377 case llvm::Triple::sparc:
380 case llvm::Triple::mips64:
381 case llvm::Triple::mips64el:
382 case llvm::Triple::ppc:
383 case llvm::Triple::sparcv9:
665 .Case("generic", true)
666 .Case("440", true)
667 .Case("450", true)
668 .Case("601", true)
669 .Case("602", true)
670 .Case("603", true)
671 .Case("603e", true)
672 .Case("603ev", true)
673 .Case("604", true)
674 .Case("604e", true)
675 .Case("620", true)
676 .Case("630", true)
677 .Case("g3", true)
678 .Case("7400", true)
679 .Case("g4", true)
680 .Case("7450", true)
681 .Case("g4+", true)
682 .Case("750", true)
683 .Case("970", true)
684 .Case("g5", true)
685 .Case("a2", true)
686 .Case("a2q", true)
687 .Case("e500mc", true)
688 .Case("e5500", true)
689 .Case("power3", true)
690 .Case("pwr3", true)
691 .Case("power4", true)
692 .Case("pwr4", true)
693 .Case("power5", true)
694 .Case("pwr5", true)
695 .Case("power5x", true)
696 .Case("pwr5x", true)
697 .Case("power6", true)
698 .Case("pwr6", true)
699 .Case("power6x", true)
700 .Case("pwr6x", true)
701 .Case("power7", true)
702 .Case("pwr7", true)
703 .Case("powerpc", true)
704 .Case("ppc", true)
705 .Case("powerpc64", true)
706 .Case("ppc64", true)
707 .Case("powerpc64le", true)
708 .Case("ppc64le", true)
744 case 'O': // Zero
746 case 'b': // Base register
747 case 'f': // Floating point register
753 case 'd': // Floating point register (containing 64-bit value)
754 case 'v': // Altivec vector register
757 case 'w':
759 case 'd':// VSX vector register to hold vector double data
760 case 'f':// VSX vector register to hold vector float data
761 case 's':// VSX vector register to hold scalar float data
762 case 'a':// Any VSX register
770 case 'h': // `MQ', `CTR', or `LINK' register
771 case 'q': // `MQ' register
772 case 'c': // `CTR' register
773 case 'l': // `LINK' register
774 case 'x': // `CR' register (condition register) number 0
775 case 'y': // `CR' register (condition register)
776 case 'z': // `XER[CA]' carry bit (part of the XER register)
779 case 'I': // Signed 16-bit constant
780 case 'J': // Unsigned 16-bit constant shifted left 16 bits
782 case 'K': // Unsigned 16-bit constant
783 case 'L': // Signed 16-bit constant shifted left 16 bits
784 case 'M': // Constant larger than 31
785 case 'N': // Exact power of 2
786 case 'P': // Constant whose negation is a signed 16-bit constant
787 case 'G': // Floating point constant that can be loaded into a
789 case 'H': // Integer/Floating point constant that can be loaded
792 case 'm': // Memory operand. Note that on PowerPC targets, m can
804 case 'e':
815 case 'Q': // Memory operand that is an offset from a register (it is
817 case 'Z': // Memory operand that is an indexed or indirect from a
823 case 'R': // AIX TOC entry
824 case 'a': // Address operand that is an indexed or indirect from a
826 case 'S': // Constant suitable as a 64-bit mask operand
827 case 'T': // Constant suitable as a 32-bit mask operand
828 case 'U': // System V Release 4 small data area reference
829 case 't': // AND masks that can be performed by two rldic{l, r}
831 case 'W': // Vector constant that does not require memory
832 case 'j': // Vector constant that is all zeros.
899 .Case("440", ArchDefineName)
900 .Case("450", ArchDefineName | ArchDefine440)
901 .Case("601", ArchDefineName)
902 .Case("602", ArchDefineName | ArchDefinePpcgr)
903 .Case("603", ArchDefineName | ArchDefinePpcgr)
904 .Case("603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
905 .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
906 .Case("604", ArchDefineName | ArchDefinePpcgr)
907 .Case("604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
908 .Case("620", ArchDefineName | ArchDefinePpcgr)
909 .Case("630", ArchDefineName | ArchDefinePpcgr)
910 .Case("7400", ArchDefineName | ArchDefinePpcgr)
911 .Case("7450", ArchDefineName | ArchDefinePpcgr)
912 .Case("750", ArchDefineName | ArchDefinePpcgr)
913 .Case("970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
915 .Case("a2", ArchDefineA2)
916 .Case("a2q", ArchDefineName | ArchDefineA2 | ArchDefineA2q)
917 .Case("pwr3", ArchDefinePpcgr)
918 .Case("pwr4", ArchDefineName | ArchDefinePpcgr | ArchDefinePpcsq)
919 .Case("pwr5", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
921 .Case("pwr5x", ArchDefineName | ArchDefinePwr5 | ArchDefinePwr4
923 .Case("pwr6", ArchDefineName | ArchDefinePwr5x | ArchDefinePwr5
925 .Case("pwr6x", ArchDefineName | ArchDefinePwr6 | ArchDefinePwr5x
928 .Case("pwr7", ArchDefineName | ArchDefinePwr6x | ArchDefinePwr6
931 .Case("power3", ArchDefinePpcgr)
932 .Case("power4", ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
933 .Case("power5", ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
935 .Case("power5x", ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
937 .Case("power6", ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
939 .Case("power6x", ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
942 .Case("power7", ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6
1009 .Case("7400", true)
1010 .Case("g4", true)
1011 .Case("7450", true)
1012 .Case("g4+", true)
1013 .Case("970", true)
1014 .Case("g5", true)
1015 .Case("pwr6", true)
1016 .Case("pwr7", true)
1017 .Case("ppc64", true)
1018 .Case("ppc64le", true)
1153 case llvm::Triple::Linux:
1154 case llvm::Triple::FreeBSD:
1155 case llvm::Triple::NetBSD:
1293 case 'c':
1294 case 'h':
1295 case 'r':
1296 case 'l':
1297 case 'f':
1298 case 'd':
1313 .Case("sm_20", true)
1314 .Case("sm_21", true)
1315 .Case("sm_30", true)
1316 .Case("sm_35", true)
1476 .Case("r600" , GK_R600)
1477 .Case("rv610", GK_R600)
1478 .Case("rv620", GK_R600)
1479 .Case("rv630", GK_R600)
1480 .Case("rv635", GK_R600)
1481 .Case("rs780", GK_R600)
1482 .Case("rs880", GK_R600)
1483 .Case("rv670", GK_R600_DOUBLE_OPS)
1484 .Case("rv710", GK_R700)
1485 .Case("rv730", GK_R700)
1486 .Case("rv740", GK_R700_DOUBLE_OPS)
1487 .Case("rv770", GK_R700_DOUBLE_OPS)
1488 .Case("palm", GK_EVERGREEN)
1489 .Case("cedar", GK_EVERGREEN)
1490 .Case("sumo", GK_EVERGREEN)
1491 .Case("sumo2", GK_EVERGREEN)
1492 .Case("redwood", GK_EVERGREEN)
1493 .Case("juniper", GK_EVERGREEN)
1494 .Case("hemlock", GK_EVERGREEN_DOUBLE_OPS)
1495 .Case("cypress", GK_EVERGREEN_DOUBLE_OPS)
1496 .Case("barts", GK_NORTHERN_ISLANDS)
1497 .Case("turks", GK_NORTHERN_ISLANDS)
1498 .Case("caicos", GK_NORTHERN_ISLANDS)
1499 .Case("cayman", GK_CAYMAN)
1500 .Case("aruba", GK_CAYMAN)
1501 .Case("tahiti", GK_SOUTHERN_ISLANDS)
1502 .Case("pitcairn", GK_SOUTHERN_ISLANDS)
1503 .Case("verde", GK_SOUTHERN_ISLANDS)
1504 .Case("oland", GK_SOUTHERN_ISLANDS)
1513 case GK_NONE:
1514 case GK_R600:
1515 case GK_R700:
1516 case GK_EVERGREEN:
1517 case GK_NORTHERN_ISLANDS:
1520 case GK_R600_DOUBLE_OPS:
1521 case GK_R700_DOUBLE_OPS:
1522 case GK_EVERGREEN_DOUBLE_OPS:
1523 case GK_CAYMAN:
1526 case GK_SOUTHERN_ISLANDS:
1794 .Case("i386", CK_i386)
1795 .Case("i486", CK_i486)
1796 .Case("winchip-c6", CK_WinChipC6)
1797 .Case("winchip2", CK_WinChip2)
1798 .Case("c3", CK_C3)
1799 .Case("i586", CK_i586)
1800 .Case("pentium", CK_Pentium)
1801 .Case("pentium-mmx", CK_PentiumMMX)
1802 .Case("i686", CK_i686)
1803 .Case("pentiumpro", CK_PentiumPro)
1804 .Case("pentium2", CK_Pentium2)
1805 .Case("pentium3", CK_Pentium3)
1806 .Case("pentium3m", CK_Pentium3M)
1807 .Case("pentium-m", CK_PentiumM)
1808 .Case("c3-2", CK_C3_2)
1809 .Case("yonah", CK_Yonah)
1810 .Case("pentium4", CK_Pentium4)
1811 .Case("pentium4m", CK_Pentium4M)
1812 .Case("prescott", CK_Prescott)
1813 .Case("nocona", CK_Nocona)
1814 .Case("core2", CK_Core2)
1815 .Case("penryn", CK_Penryn)
1816 .Case("atom", CK_Atom)
1817 .Case("corei7", CK_Corei7)
1818 .Case("corei7-avx", CK_Corei7AVX)
1819 .Case("core-avx-i", CK_CoreAVXi)
1820 .Case("core-avx2", CK_CoreAVX2)
1821 .Case("k6", CK_K6)
1822 .Case("k6-2", CK_K6_2)
1823 .Case("k6-3", CK_K6_3)
1824 .Case("athlon", CK_Athlon)
1825 .Case("athlon-tbird", CK_AthlonThunderbird)
1826 .Case("athlon-4", CK_Athlon4)
1827 .Case("athlon-xp", CK_AthlonXP)
1828 .Case("athlon-mp", CK_AthlonMP)
1829 .Case("athlon64", CK_Athlon64)
1830 .Case("athlon64-sse3", CK_Athlon64SSE3)
1831 .Case("athlon-fx", CK_AthlonFX)
1832 .Case("k8", CK_K8)
1833 .Case("k8-sse3", CK_K8SSE3)
1834 .Case("opteron", CK_Opteron)
1835 .Case("opteron-sse3", CK_OpteronSSE3)
1836 .Case("amdfam10", CK_AMDFAM10)
1837 .Case("btver1", CK_BTVER1)
1838 .Case("btver2", CK_BTVER2)
1839 .Case("bdver1", CK_BDVER1)
1840 .Case("bdver2", CK_BDVER2)
1841 .Case("x86-64", CK_x86_64)
1842 .Case("geode", CK_Geode)
1850 case CK_Generic:
1854 case CK_i386:
1855 case CK_i486:
1856 case CK_WinChipC6:
1857 case CK_WinChip2:
1858 case CK_C3:
1859 case CK_i586:
1860 case CK_Pentium:
1861 case CK_PentiumMMX:
1862 case CK_i686:
1863 case CK_PentiumPro:
1864 case CK_Pentium2:
1865 case CK_Pentium3:
1866 case CK_Pentium3M:
1867 case CK_PentiumM:
1868 case CK_Yonah:
1869 case CK_C3_2:
1870 case CK_Pentium4:
1871 case CK_Pentium4M:
1872 case CK_Prescott:
1873 case CK_K6:
1874 case CK_K6_2:
1875 case CK_K6_3:
1876 case CK_Athlon:
1877 case CK_AthlonThunderbird:
1878 case CK_Athlon4:
1879 case CK_AthlonXP:
1880 case CK_AthlonMP:
1881 case CK_Geode:
1887 case CK_Nocona:
1888 case CK_Core2:
1889 case CK_Penryn:
1890 case CK_Atom:
1891 case CK_Corei7:
1892 case CK_Corei7AVX:
1893 case CK_CoreAVXi:
1894 case CK_CoreAVX2:
1895 case CK_Athlon64:
1896 case CK_Athlon64SSE3:
1897 case CK_AthlonFX:
1898 case CK_K8:
1899 case CK_K8SSE3:
1900 case CK_Opteron:
1901 case CK_OpteronSSE3:
1902 case CK_AMDFAM10:
1903 case CK_BTVER1:
1904 case CK_BTVER2:
1905 case CK_BDVER1:
1906 case CK_BDVER2:
1907 case CK_x86_64:
1964 case CK_Generic:
1965 case CK_i386:
1966 case CK_i486:
1967 case CK_i586:
1968 case CK_Pentium:
1969 case CK_i686:
1970 case CK_PentiumPro:
1972 case CK_PentiumMMX:
1973 case CK_Pentium2:
1976 case CK_Pentium3:
1977 case CK_Pentium3M:
1980 case CK_PentiumM:
1981 case CK_Pentium4:
1982 case CK_Pentium4M:
1983 case CK_x86_64:
1986 case CK_Yonah:
1987 case CK_Prescott:
1988 case CK_Nocona:
1991 case CK_Core2:
1994 case CK_Penryn:
1997 case CK_Atom:
2000 case CK_Corei7:
2003 case CK_Corei7AVX:
2008 case CK_CoreAVXi:
2015 case CK_CoreAVX2:
2027 case CK_K6:
2028 case CK_WinChipC6:
2031 case CK_K6_2:
2032 case CK_K6_3:
2033 case CK_WinChip2:
2034 case CK_C3:
2037 case CK_Athlon:
2038 case CK_AthlonThunderbird:
2039 case CK_Geode:
2042 case CK_Athlon4:
2043 case CK_AthlonXP:
2044 case CK_AthlonMP:
2048 case CK_K8:
2049 case CK_Opteron:
2050 case CK_Athlon64:
2051 case CK_AthlonFX:
2055 case CK_K8SSE3:
2056 case CK_OpteronSSE3:
2057 case CK_Athlon64SSE3:
2061 case CK_AMDFAM10:
2068 case CK_BTVER1:
2074 case CK_BTVER2:
2083 case CK_BDVER1:
2089 case CK_BDVER2:
2098 case CK_C3_2:
2348 .Case("avx2", AVX2)
2349 .Case("avx", AVX)
2350 .Case("sse42", SSE42)
2351 .Case("sse41", SSE41)
2352 .Case("ssse3", SSSE3)
2353 .Case("sse3", SSE3)
2354 .Case("sse2", SSE2)
2355 .Case("sse", SSE1)
2361 .Case("3dnowa", AMD3DNowAthlon)
2362 .Case("3dnow", AMD3DNow)
2363 .Case("mmx", MMX)
2395 case CK_Generic:
2397 case CK_i386:
2401 case CK_i486:
2402 case CK_WinChipC6:
2403 case CK_WinChip2:
2404 case CK_C3:
2407 case CK_PentiumMMX:
2411 case CK_i586:
2412 case CK_Pentium:
2416 case CK_Pentium3:
2417 case CK_Pentium3M:
2418 case CK_PentiumM:
2421 case CK_Pentium2:
2422 case CK_C3_2:
2425 case CK_PentiumPro:
2429 case CK_i686:
2436 case CK_Pentium4:
2437 case CK_Pentium4M:
2440 case CK_Yonah:
2441 case CK_Prescott:
2442 case CK_Nocona:
2445 case CK_Core2:
2446 case CK_Penryn:
2449 case CK_Atom:
2452 case CK_Corei7:
2453 case CK_Corei7AVX:
2454 case CK_CoreAVXi:
2455 case CK_CoreAVX2:
2458 case CK_K6_2:
2462 case CK_K6_3:
2463 if (CPU != CK_K6_2) { // In case of fallthrough
2471 case CK_K6:
2474 case CK_Athlon:
2475 case CK_AthlonThunderbird:
2476 case CK_Athlon4:
2477 case CK_AthlonXP:
2478 case CK_AthlonMP:
2485 case CK_K8:
2486 case CK_K8SSE3:
2487 case CK_x86_64:
2488 case CK_Opteron:
2489 case CK_OpteronSSE3:
2490 case CK_Athlon64:
2491 case CK_Athlon64SSE3:
2492 case CK_AthlonFX:
2495 case CK_AMDFAM10:
2498 case CK_BTVER1:
2501 case CK_BTVER2:
2504 case CK_BDVER1:
2507 case CK_BDVER2:
2510 case CK_Geode:
2569 // Each case falls through to the previous one here.
2571 case AVX2:
2573 case AVX:
2575 case SSE42:
2577 case SSE41:
2579 case SSSE3:
2581 case SSE3:
2583 case SSE2:
2586 case SSE1:
2589 case NoSSE:
2595 case AVX2:
2596 case AVX:
2597 case SSE42:
2598 case SSE41:
2599 case SSSE3:
2600 case SSE3:
2601 case SSE2:
2604 case SSE1:
2612 // Each case falls through to the previous one here.
2614 case AMD3DNowAthlon:
2616 case AMD3DNow:
2618 case MMX:
2620 case NoMMX3DNow:
2635 .Case("aes", HasAES)
2636 .Case("avx", SSELevel >= AVX)
2637 .Case("avx2", SSELevel >= AVX2)
2638 .Case("bmi", HasBMI)
2639 .Case("bmi2", HasBMI2)
2640 .Case("fma", HasFMA)
2641 .Case("fma4", HasFMA4)
2642 .Case("lzcnt", HasLZCNT)
2643 .Case("rdrnd", HasRDRND)
2644 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2645 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2646 .Case("mmx", MMX3DNowLevel >= MMX)
2647 .Case("pclmul", HasPCLMUL)
2648 .Case("popcnt", HasPOPCNT)
2649 .Case("rtm", HasRTM)
2650 .Case("prfchw", HasPRFCHW)
2651 .Case("rdseed", HasRDSEED)
2652 .Case("sse", SSELevel >= SSE1)
2653 .Case("sse2", SSELevel >= SSE2)
2654 .Case("sse3", SSELevel >= SSE3)
2655 .Case("ssse3", SSELevel >= SSSE3)
2656 .Case("sse41", SSELevel >= SSE41)
2657 .Case("sse42", SSELevel >= SSE42)
2658 .Case("sse4a", HasSSE4a)
2659 .Case("x86", true)
2660 .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2661 .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2662 .Case("xop", HasXOP)
2663 .Case("f16c", HasF16C)
2672 case 'Y': // first letter of a pair:
2675 case '0': // First SSE register.
2676 case 't': // Any SSE register, when SSE2 is enabled.
2677 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
2678 case 'm': // any MMX register, when inter-unit moves enabled.
2681 case 'a': // eax.
2682 case 'b': // ebx.
2683 case 'c': // ecx.
2684 case 'd': // edx.
2685 case 'S': // esi.
2686 case 'D': // edi.
2687 case 'A': // edx:eax.
2688 case 'f': // any x87 floating point stack register.
2689 case 't': // top of floating point stack.
2690 case 'u': // second from top of floating point stack.
2691 case 'q': // Any register accessible as [r]l: a, b, c, and d.
2692 case 'y': // Any MMX register.
2693 case 'x': // Any SSE register.
2694 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2695 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2696 case 'l': // "Index" registers: any general register that can be used as an
2700 case 'C': // SSE floating point constant.
2701 case 'G': // x87 floating point constant.
2702 case 'e': // 32-bit signed integer constant for use with zero-extending
2704 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2714 case 'a': return std::string("{ax}");
2715 case 'b': return std::string("{bx}");
2716 case 'c': return std::string("{cx}");
2717 case 'd': return std::string("{dx}");
2718 case 'S': return std::string("{si}");
2719 case 'D': return std::string("{di}");
2720 case 'p': // address
2722 case 't': // top of floating point stack.
2724 case 'u': // second from top of floating point stack.
2772 case 'a':
2773 case 'b':
2774 case 'c':
2775 case 'd':
2975 case llvm::Triple::x86:
2978 case llvm::Triple::mips:
2979 case llvm::Triple::mipsel:
2980 case llvm::Triple::ppc:
2981 case llvm::Triple::ppc64:
2982 case llvm::Triple::ppc64le:
2985 case llvm::Triple::arm:
3299 case 'w': // An FP/SIMD vector register
3302 case 'I': // Constant that can be used with an ADD instruction
3303 case 'J': // Constant that can be used with a SUB instruction
3304 case 'K': // Constant that can be used with a 32-bit logical instruction
3305 case 'L': // Constant that can be used with a 64-bit logical instruction
3306 case 'M': // Constant that can be used as a 32-bit MOV immediate
3307 case 'N': // Constant that can be used as a 64-bit MOV immediate
3308 case 'Y': // Floating point constant zero
3309 case 'Z': // Integer constant zero
3311 case 'Q': // A memory reference with base register and no offset
3314 case 'S': // A symbolic address
3317 case 'U':
3617 .Case("arm", true)
3618 .Case("softfloat", SoftFloat)
3619 .Case("thumb", IsThumb)
3620 .Case("neon", FPU == NeonFPU && !SoftFloat &&
3631 .Case("ep9312", "4T")
3634 .Case("arm926ej-s", "5TEJ")
3637 .Case("arm1136j-s", "6J")
3643 .Case("cortex-r5", "7R")
3644 .Case("cortex-a9-mp", "7F")
3645 .Case("swift", "7S")
3647 .Case("cortex-m0", "6M")
3648 .Case("cortex-a53", "8A")
3655 .Case("cortex-r5", "R")
3751 case 'l': // r0-r7
3752 case 'h': // r8-r15
3753 case 'w': // VFP Floating point register single precision
3754 case 'P': // VFP Floating point register double precision
3757 case 'Q': // A memory address that is a single base register.
3760 case 'U': // a memory reference...
3762 case 'q': // ...ARMV4 ldrsb
3763 case 'v': // ...VFP load/store (reg+constant offset)
3764 case 'y': // ...iWMMXt load/store
3765 case 't': // address valid for load/store opaque types wider
3767 case 'n': // valid address for Neon doubleword vector load/store
3768 case 'm': // valid address for Neon element and structure load/store
3769 case 's': // valid address for non-offset loads/stores of quad-word
3781 case 'U': // Two-character constraint; add "^" hint for later parsing.
3785 case 'p': // 'p' should be translated to 'r' by default.
3807 case 'r': {
3811 case 'q':
3973 .Case("hexagonv4", "4")
3974 .Case("hexagonv5", "5")
4113 .Case("softfloat", SoftFloat)
4114 .Case("sparc", true)
4319 .Case("z10", true)
4320 .Case("z196", true)
4321 .Case("zEC12", true)
4350 case 'a': // Address register
4351 case 'd': // Data register (equivalent to 'r')
4352 case 'f': // Floating-point register
4356 case 'I': // Unsigned 8-bit constant
4357 case 'J': // Unsigned 12-bit constant
4358 case 'K': // Signed 16-bit constant
4359 case 'L': // Signed 20-bit displacement (on all targets we support)
4360 case 'M': // 0x7fffffff
4363 case 'Q': // Memory with base and unsigned 12-bit displacement
4364 case 'R': // Likewise, plus an index
4365 case 'S': // Memory with base and signed 20-bit displacement
4366 case 'T': // Likewise, plus an index
4564 case HardFloat:
4567 case SoftFloat:
4584 case DSP1:
4588 case DSP2:
4643 case 'r': // CPU registers.
4644 case 'd': // Equivalent to "r" unless generating MIPS16 code.
4645 case 'y': // Equivalent to "r", backwards compatibility only.
4646 case 'f': // floating-point registers.
4647 case 'c': // $25 for indirect jumps
4648 case 'l': // lo register
4649 case 'x': // hilo register pair
4652 case 'R': // An address that can be used in a non-macro load or store
5148 case llvm::Triple::hexagon:
5151 case llvm::Triple::aarch64:
5153 case llvm::Triple::Linux:
5159 case llvm::Triple::arm:
5160 case llvm::Triple::thumb:
5165 case llvm::Triple::Linux:
5167 case llvm::Triple::FreeBSD:
5169 case llvm::Triple::NetBSD:
5171 case llvm::Triple::OpenBSD:
5173 case llvm::Triple::Bitrig:
5175 case llvm::Triple::RTEMS:
5177 case llvm::Triple::NaCl:
5183 case llvm::Triple::msp430:
5186 case llvm::Triple::mips:
5188 case llvm::Triple::Linux:
5190 case llvm::Triple::RTEMS:
5192 case llvm::Triple::FreeBSD:
5194 case llvm::Triple::NetBSD:
5200 case llvm::Triple::mipsel:
5202 case llvm::Triple::Linux:
5204 case llvm::Triple::RTEMS:
5206 case llvm::Triple::FreeBSD:
5208 case llvm::Triple::NetBSD:
5214 case llvm::Triple::mips64:
5216 case llvm::Triple::Linux:
5218 case llvm::Triple::RTEMS:
5220 case llvm::Triple::FreeBSD:
5222 case llvm::Triple::NetBSD:
5224 case llvm::Triple::OpenBSD:
5230 case llvm::Triple::mips64el:
5232 case llvm::Triple::Linux:
5234 case llvm::Triple::RTEMS:
5236 case llvm::Triple::FreeBSD:
5238 case llvm::Triple::NetBSD:
5240 case llvm::Triple::OpenBSD:
5246 case llvm::Triple::le32:
5248 case llvm::Triple::NaCl:
5254 case llvm::Triple::ppc:
5258 case llvm::Triple::Linux:
5260 case llvm::Triple::FreeBSD:
5262 case llvm::Triple::NetBSD:
5264 case llvm::Triple::OpenBSD:
5266 case llvm::Triple::RTEMS:
5272 case llvm::Triple::ppc64:
5276 case llvm::Triple::Linux:
5278 case llvm::Triple::Lv2:
5280 case llvm::Triple::FreeBSD:
5282 case llvm::Triple::NetBSD:
5288 case llvm::Triple::ppc64le:
5290 case llvm::Triple::Linux:
5296 case llvm::Triple::nvptx:
5298 case llvm::Triple::nvptx64:
5301 case llvm::Triple::r600:
5304 case llvm::Triple::sparc:
5306 case llvm::Triple::Linux:
5308 case llvm::Triple::AuroraUX:
5310 case llvm::Triple::Solaris:
5312 case llvm::Triple::NetBSD:
5314 case llvm::Triple::OpenBSD:
5316 case llvm::Triple::RTEMS:
5322 case llvm::Triple::sparcv9:
5324 case llvm::Triple::Linux:
5326 case llvm::Triple::AuroraUX:
5328 case llvm::Triple::Solaris:
5330 case llvm::Triple::NetBSD:
5332 case llvm::Triple::OpenBSD:
5334 case llvm::Triple::FreeBSD:
5340 case llvm::Triple::systemz:
5342 case llvm::Triple::Linux:
5348 case llvm::Triple::tce:
5351 case llvm::Triple::x86:
5356 case llvm::Triple::AuroraUX:
5358 case llvm::Triple::Linux:
5360 case llvm::Triple::DragonFly:
5362 case llvm::Triple::NetBSD:
5364 case llvm::Triple::OpenBSD:
5366 case llvm::Triple::Bitrig:
5368 case llvm::Triple::FreeBSD:
5370 case llvm::Triple::Minix:
5372 case llvm::Triple::Solaris:
5374 case llvm::Triple::Cygwin:
5376 case llvm::Triple::MinGW32:
5378 case llvm::Triple::Win32:
5380 case llvm::Triple::Haiku:
5382 case llvm::Triple::RTEMS:
5384 case llvm::Triple::NaCl:
5390 case llvm::Triple::x86_64:
5395 case llvm::Triple::AuroraUX:
5397 case llvm::Triple::Linux:
5399 case llvm::Triple::DragonFly:
5401 case llvm::Triple::NetBSD:
5403 case llvm::Triple::OpenBSD:
5405 case llvm::Triple::Bitrig:
5407 case llvm::Triple::FreeBSD:
5409 case llvm::Triple::Solaris:
5411 case llvm::Triple::MinGW32:
5413 case llvm::Triple::Win32: // This is what Triple.h supports now.
5415 case llvm::Triple::NaCl:
5421 case llvm::Triple::spir: {
5427 case llvm::Triple::spir64: {
