Lines Matching defs:Lo
480 SDValue Lo, Hi;
496 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
498 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
499 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
500 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
501 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
502 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
503 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
504 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
505 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
506 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
507 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
508 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
509 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
511 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
514 SplitVecRes_SETCC(N, Lo, Hi);
517 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
551 SplitVecRes_UnaryOp(N, Lo, Hi);
573 SplitVecRes_BinOp(N, Lo, Hi);
576 SplitVecRes_TernaryOp(N, Lo, Hi);
580 // If Lo/Hi is null, the sub-method took care of registering results etc.
581 if (Lo.getNode())
582 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
585 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
593 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
597 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
607 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
613 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
638 GetExpandedOp(InOp, Lo, Hi);
640 std::swap(Lo, Hi);
641 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
649 GetSplitVector(InOp, Lo, Hi);
650 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
661 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
664 std::swap(Lo, Hi);
665 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
669 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
676 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
682 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
688 Lo = N->getOperand(0);
697 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
703 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
712 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
719 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
722 GetSplitVector(N->getOperand(0), Lo, Hi);
723 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
727 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
736 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
742 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
748 GetSplitVector(Vec, Lo, Hi);
752 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
754 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
755 Lo.getValueType(), Lo, Elt, Idx);
779 // Load the Lo part from the stack slot.
780 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
784 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
793 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
798 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
802 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
822 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
835 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
843 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
869 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
873 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
884 GetSplitVector(N->getOperand(0), Lo, Hi);
888 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
896 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
901 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
906 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
911 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
917 SDValue &Lo, SDValue &Hi) {
926 // If Lo or Hi uses elements from at most two of the four input vectors, then
928 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
931 SDValue &Output = High ? Hi : Lo;
1007 // Construct the Lo/Hi output using a BUILD_VECTOR.
1112 SDValue Lo, Hi;
1113 GetSplitVector(N->getOperand(0), Lo, Hi);
1114 assert(Lo.getValueType() == Hi.getValueType() &&
1115 "Lo and Hi have differing types");
1117 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
1155 SDValue Lo, Hi;
1157 GetSplitVector(N->getOperand(0), Lo, Hi);
1158 EVT InVT = Lo.getValueType();
1163 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1166 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1173 SDValue Lo, Hi;
1174 GetSplitVector(N->getOperand(0), Lo, Hi);
1175 Lo = BitConvertToInteger(Lo);
1179 std::swap(Lo, Hi);
1182 JoinIntegers(Lo, Hi));
1190 SDValue Lo, Hi;
1191 GetSplitVector(N->getOperand(0), Lo, Hi);
1193 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1199 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1215 SDValue Lo, Hi;
1216 GetSplitVector(Vec, Lo, Hi);
1218 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1221 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1252 SDValue Lo, Hi;
1253 GetSplitVector(N->getOperand(1), Lo, Hi);
1261 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1264 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1280 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1391 SDValue Lo, Hi;
1393 GetSplitVector(N->getOperand(0), Lo, Hi);
1394 EVT InVT = Lo.getValueType();
1399 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1402 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
