Lines Matching full:outs
1050 def ri : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
1063 def rr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
1078 def rsi : AsI1<opcod, (outs GPR:$Rd),
1094 def rsr : AsI1<opcod, (outs GPR:$Rd),
1123 def ri : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
1136 def rr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
1150 def rsi : AsI1<opcod, (outs GPR:$Rd),
1166 def rsr : AsI1<opcod, (outs GPR:$Rd),
1193 def ri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm, pred:$p),
1198 def rr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, pred:$p),
1204 def rsi : ARMPseudoInst<(outs GPR:$Rd),
1211 def rsr : ARMPseudoInst<(outs GPR:$Rd),
1226 def ri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm, pred:$p),
1231 def rsi : ARMPseudoInst<(outs GPR:$Rd),
1238 def rsr : ARMPseudoInst<(outs GPR:$Rd),
1254 def ri : AI1<opcod, (outs
1268 def rr : AI1<opcod, (outs), (ins GPR:$Rn, GPR:$Rm), DPFrm, iir,
1284 def rsi : AI1<opcod, (outs),
1301 def rsr : AI1<opcod, (outs),
1328 : AExtI<opcod, (outs GPRnopc:$Rd), (ins GPRnopc:$Rm, rot_imm:$rot),
1342 : AExtI<opcod, (outs GPRnopc:$Rd), (ins GPRnopc:$Rm, rot_imm:$rot),
1353 : AExtI<opcod, (outs GPRnopc:$Rd), (ins GPR:$Rn, GPRnopc:$Rm, rot_imm:$rot),
1370 : AExtI<opcod, (outs GPRnopc:$Rd), (ins GPR:$Rn, GPRnopc:$Rm, rot_imm:$rot),
1384 def ri : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
1397 def rr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
1412 def rsi : AsI1<opcod, (outs GPR:$Rd),
1428 def rsr : AsI1<opcod, (outs GPRnopc:$Rd),
1454 def ri : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm),
1467 def rr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
1480 def rsi : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_reg_imm:$shift),
1495 def rsr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_reg_reg:$shift),
1521 def i12: AI2ldst<0b010, 1, isByte, (outs GPR:$Rt), (ins addrmode_imm12:$addr),
1531 def rs : AI2ldst<0b011, 1, isByte, (outs GPR:$Rt), (ins ldst_so_reg:$shift),
1551 def i12: AI2ldst<0b010, 1, isByte, (outs GPRnopc:$Rt),
1562 def rs : AI2ldst<0b011, 1, isByte, (outs GPRnopc:$Rt),
1583 def i12 : AI2ldst<0b010, 0, isByte, (outs),
1594 def rs : AI2ldst<0b011, 0, isByte, (outs), (ins GPR:$Rt, ldst_so_reg:$shift),
1612 def i12 : AI2ldst<0b010, 0, isByte, (outs),
1623 def rs : AI2ldst<0b011, 0, isByte, (outs),
1652 PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx,
1660 PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2, pred:$p), NoItinerary,
1664 PseudoInst<(outs), (ins i32imm:$amt, pred:$p), NoItinerary,
1671 def ATOMOR6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1674 def ATOMXOR6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1677 def ATOMADD6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1680 def ATOMSUB6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1683 def ATOMNAND6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1686 def ATOMAND6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1689 def ATOMSWAP6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1692 def ATOMCMPXCHG6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1696 def ATOMMIN6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1699 def ATOMUMIN6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1702 def ATOMMAX6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1705 def ATOMUMAX6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
1710 def HINT : AI<(outs), (ins imm0_4:$imm), MiscFrm, NoItinerary,
1723 def SEL : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm, NoItinerary, "sel",
1739 def BKPT : AInoP<(outs), (ins imm0_65535:$val), MiscFrm, NoItinerary,
1752 : AXI<(outs), iops, MiscFrm, NoItinerary, !strconcat("cps", asm_ops),
1783 def i12 : AXI<(outs), (ins addrmode_imm12:$addr), MiscFrm, IIC_Preload,
1800 def rs : AXI<(outs), (ins ldst_so_reg:$shift), MiscFrm, IIC_Preload,
1822 def SETEND : AXI<(outs), (ins setend_op:$end), MiscFrm, NoItinerary,
1830 def DBG : AI<(outs), (ins imm0_15:$opt), MiscFrm, NoItinerary, "dbg", "\t$opt",
1854 def TRAPNaCl : AXI<(outs), (ins), MiscFrm, NoItinerary,
1860 def TRAP : AXI<(outs), (ins), MiscFrm, NoItinerary,
1868 def PICADD : ARMPseudoInst<(outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),
1874 def PICLDR : ARMPseudoInst<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
1878 def PICLDRH : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p),
1882 def PICLDRB : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p),
1886 def PICLDRSH : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p),
1890 def PICLDRSB : ARMPseudoInst<(outs GPR:$Rt), (ins addrmodepc:$addr, pred:$p),
1895 def PICSTR : ARMPseudoInst<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
1898 def PICSTRH : ARMPseudoInst<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
1902 def PICSTRB : ARMPseudoInst<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
1914 def ADR : AI1<{0,?,?,0}, (outs GPR:$Rd), (ins adrlabel:$label),
1930 def LEApcrel : ARMPseudoInst<(outs GPR:$Rd), (ins i32imm:$label, pred:$p),
1933 def LEApcrelJT : ARMPseudoInst<(outs GPR:$Rd),
1944 def BX_RET : AI<(outs), (ins), BrMiscFrm, IIC_Br,
1951 def MOVPCLR : AI<(outs), (ins), BrMiscFrm, IIC_Br,
1961 def BX : AXI<(outs), (ins GPR:$dst), BrMiscFrm, IIC_Br, "bx\t$dst",
1969 def BX_pred : AI<(outs), (ins GPR:$dst), BrMiscFrm, IIC_Br,
1985 def BL : ABXI<0b1011, (outs), (ins bl_target:$func),
1995 def BL_pred : ABI<0b1011, (outs), (ins bl_target:$func),
2005 def BLX : AXI<(outs), (ins GPR:$func), BrMiscFrm,
2014 def BLX_pred : AI<(outs), (ins GPR:$func), BrMiscFrm,
2025 def BX_CALL : ARMPseudoInst<(outs), (ins tGPR:$func),
2030 def BMOVPCRX_CALL : ARMPseudoInst<(outs), (ins tGPR:$func),
2036 def BMOVPCB_CALL : ARMPseudoInst<(outs), (ins bl_target:$func),
2044 def Bcc : ABI<0b1010, (outs), (ins br_target:$target),
2059 def B : ARMPseudoExpand<(outs), (ins br_target:$target), 4, IIC_Br,
2064 def BR_JTr : ARMPseudoInst<(outs),
2071 def BR_JTm : ARMPseudoInst<(outs),
2076 def BR_JTadd : ARMPseudoInst<(outs),
2087 def BLXi : AXI<(outs), (ins blx_target:$target), BrMiscFrm, NoItinerary,
2097 def BXJ : ABI<0b0001, (outs), (ins GPR:$func), NoItinerary, "bxj", "\t$func",
2109 def TCRETURNdi : PseudoInst<(outs), (ins i32imm:$dst), IIC_Br, []>,
2112 def TCRETURNri : PseudoInst<(outs), (ins tcGPR:$dst), IIC_Br, []>,
2115 def TAILJMPd : ARMPseudoExpand<(outs), (ins br_target:$dst),
2120 def TAILJMPr : ARMPseudoExpand<(outs), (ins tcGPR:$dst),
2127 def SMC : ABI<0b0001, (outs
2136 def SVC : ABI<0b1111, (outs), (ins imm24b:$svc), IIC_Br, "svc", "\t$svc", []>,
2145 : XI<(outs), (ins imm0_31:$mode), AddrModeNone, 4, IndexModeNone, BrFrm,
2197 : XI<(outs), (ins GPR:$Rn), AddrModeNone, 4, IndexModeNone, BrFrm,
2253 def LDRcp : AI2ldst<0b010, 1, 0, (outs GPR:$Rt), (ins addrmode_imm12:$addr),
2265 def LDRH : AI3ld<0b1011, 1, (outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm,
2270 def LDRSH : AI3ld<0b1111, 1, (outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm,
2274 def LDRSB : AI3ld<0b1101, 1, (outs GPR:$Rt), (ins addrmode3:$addr), LdMiscFrm,
2280 def LDRD : AI3ld<0b1101, 0, (outs GPR:$Rd, GPR:$dst2),
2289 def _PRE_IMM : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb),
2300 def _PRE_REG : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb),
2312 def _POST_REG : AI2ldstidx<1, isByte, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2330 def _POST_IMM : AI2ldstidx<1, isByte, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2357 def _PRE : AI3ldstidx<op, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
2369 def _POST : AI3ldstidx<op, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2390 def LDRD_PRE : AI3ldstidx<0b1101, 0, 1, (outs GPR:$Rt, GPR:$Rt2, GPR:$Rn_wb),
2403 def LDRD_POST: AI3ldstidx<0b1101, 0, 0, (outs GPR:$Rt, GPR:$Rt2, GPR:$Rn_wb),
2422 def LDRT_POST_REG : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2441 def LDRT_POST_IMM : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2458 def LDRBT_POST_REG : AI2ldstidx<1, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2477 def LDRBT_POST_IMM : AI2ldstidx<1, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
2495 def i : AI3ldstidxT<op, 1, (outs GPR:$Rt, GPR:$base_wb),
2505 def r : AI3ldstidxT<op, 1, (outs GPRnopc:$Rt, GPRnopc:$base_wb),
2527 def STRH : AI3str<0b1011, (outs), (ins GPR:$Rt, addrmode3:$addr), StMiscFrm,
2533 def STRD : AI3str<0b1111, (outs), (ins GPR:$Rt, GPR:$src2, addrmode3:$addr),
2543 def _PRE_IMM : AI2ldstidx<0, isByte, 1, (outs GPR:$Rn_wb),
2555 def _PRE_REG : AI2ldstidx<0, isByte, 1, (outs GPR:$Rn_wb),
2567 def _POST_REG : AI2ldstidx<0, isByte, 0, (outs GPR:$Rn_wb),
2585 def _POST_IMM : AI2ldstidx<0, isByte, 0, (outs GPR:$Rn_wb),
2634 def STRi_preidx: ARMPseudoInst<(outs GPR:$Rn_wb),
2639 def STRr_preidx: ARMPseudoInst<(outs GPR:$Rn_wb),
2644 def STRBi_preidx: ARMPseudoInst<(outs GPR:$Rn_wb),
2649 def STRBr_preidx: ARMPseudoInst<(outs GPR:$Rn_wb),
2654 def STRH_preidx: ARMPseudoInst<(outs GPR:$Rn_wb),
2663 def STRH_PRE : AI3ldstidx<0b1011, 0, 1, (outs GPR:$Rn_wb),
2676 def STRH_POST : AI3ldstidx<0b1011, 0, 0, (outs GPR:$Rn_wb),
2694 def STRD_PRE : AI3ldstidx<0b1111, 0, 1, (outs GPR:$Rn_wb),
2708 def STRD_POST: AI3ldstidx<0b1111, 0, 0, (outs GPR:$Rn_wb),
2727 def STRBT_POST_REG : AI2ldstidx<0, 1, 0, (outs GPR:$Rn_wb),
2746 def STRBT_POST_IMM : AI2ldstidx<0, 1, 0, (outs GPR:$Rn_wb),
2764 def STRT_POST_REG : AI2ldstidx<0, 0, 0, (outs GPR:$Rn_wb),
2783 def STRT_POST_IMM : AI2ldstidx<0, 0, 0, (outs GPR:$Rn_wb),
2803 def i : AI3ldstidxT<op, 0, (outs GPR:$base_wb),
2813 def r : AI3ldstidxT<op, 0, (outs GPR:$base_wb),
2838 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2847 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2858 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2867 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2878 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2887 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2898 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2907 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
2935 def LDMIA_RET : ARMPseudoExpand<(outs GPR:$wb), (ins GPR:$Rn, pred:$p,
2956 def MOVr : AsI1<0b1101, (outs GPR:$Rd), (ins GPR:$Rm), DPFrm, IIC_iMOVr,
2970 def MOVr_TC : AsI1<0b1101, (outs tcGPR:$Rd), (ins tcGPR:$Rm), DPFrm,
2981 def MOVsr : AsI1<0b1101, (outs GPRnopc:$Rd), (ins shift_so_reg_reg:$src),
2998 def MOVsi : AsI1<0b1101, (outs GPR:$Rd), (ins shift_so_reg_imm:$src),
3013 def MOVi : AsI1<0b1101, (outs GPR:$Rd), (ins so_imm:$imm), DPFrm, IIC_iMOVi,
3025 def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm),
3044 def MOVi16_ga_pcrel : PseudoInst<(outs GPR:$Rd),
3049 def MOVTi16 : AI1<0b1010, (outs GPRnopc:$Rd),
3067 def MOVTi16_ga_pcrel : PseudoInst<(outs GPR:$Rd),
3077 def RRX: PseudoInst<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVsi,
3085 def MOVsrl_flag : PseudoInst<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVsi,
3088 def MOVsra_flag : PseudoInst<(outs GPR:$dst), (ins GPR:$src), IIC_iMOVsi,
3142 def SBFX : I<(outs GPRnopc:$Rd),
3159 def UBFX : I<(outs GPR:$Rd),
3256 : AI<(outs GPRnopc:$Rd), iops, DPFrm, IIC_iALUr, opc, asm, pattern>,
3332 def USAD8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3346 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
3364 def SSAT : AI<(outs GPRnopc:$Rd),
3380 def SSAT16 : AI<(outs GPRnopc:$Rd),
3393 def USAT : AI<(outs GPRnopc:$Rd),
3409 def USAT16 : AI<(outs GPRnopc:$Rd),
3448 def BFC : I<(outs GPR:$Rd), (ins GPR:$src, bf_inv_mask_imm:$imm),
3463 def BFI:I<(outs GPRnopc:$Rd), (ins GPRnopc:$src, GPR:$Rn, bf_inv_mask_imm:$imm),
3480 def MVNr : AsI1<0b1111, (outs GPR:$Rd), (ins GPR:$Rm), DPFrm, IIC_iMVNr,
3491 def MVNsi : AsI1<0b1111, (outs GPR:$Rd), (ins so_reg_imm:$shift),
3504 def MVNsr : AsI1<0b1111, (outs GPR:$Rd), (ins so_reg_reg:$shift),
3520 def MVNi : AsI1<0b1111, (outs GPR:$Rd), (ins so_imm:$imm), DPFrm,
3576 def MUL : AsMul1I32<0b0000000, (outs GPRnopc:$Rd),
3586 def MULv5: ARMPseudoExpand<(outs GPRnopc:$Rd), (ins GPRnopc:$Rn, GPRnopc:$Rm,
3594 def MLA : AsMul1I32<0b0000001, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
3603 def MLAv5: ARMPseudoExpand<(outs GPR:$Rd),
3610 def MLS : AMul1I<0b0000011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
3627 def SMULL : AsMul1I64<0b0000110, (outs GPR:$RdLo, GPR:$RdHi),
3632 def UMULL : AsMul1I64<0b0000100, (outs GPR:$RdLo, GPR:$RdHi),
3638 def SMULLv5 : ARMPseudoExpand<(outs GPR:$RdLo, GPR:$RdHi),
3644 def UMULLv5 : ARMPseudoExpand<(outs GPR:$RdLo, GPR:$RdHi),
3653 def SMLAL : AsMla1I64<0b0000111, (outs GPR:$RdLo, GPR:$RdHi),
3657 def UMLAL : AsMla1I64<0b0000101, (outs GPR:$RdLo, GPR:$RdHi),
3662 def UMAAL : AMul1I <0b0000010, (outs GPR:$RdLo, GPR:$RdHi),
3677 def SMLALv5 : ARMPseudoExpand<(outs GPR:$RdLo, GPR:$RdHi),
3683 def UMLALv5 : ARMPseudoExpand<(outs GPR:$RdLo, GPR:$RdHi),
3692 def UMAALv5 : ARMPseudoExpand<(outs GPR:$RdLo, GPR:$RdHi),
3702 def SMMUL : AMul2I <0b0111010, 0b0001, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3709 def SMMULR : AMul2I <0b0111010, 0b0011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3715 def SMMLA : AMul2Ia <0b0111010, 0b0001, (outs GPR:$Rd),
3721 def SMMLAR : AMul2Ia <0b0111010, 0b0011, (outs GPR:$Rd),
3726 def SMMLS : AMul2Ia <0b0111010, 0b1101, (outs GPR:$Rd),
3731 def SMMLSR : AMul2Ia <0b0111010, 0b1111, (outs GPR:$Rd),
3737 def BB : AMulxyI<0b0001011, 0b00, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3743 def BT : AMulxyI<0b0001011, 0b10, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3749 def TB : AMulxyI<0b0001011, 0b01, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3755 def TT : AMulxyI<0b0001011, 0b11, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3761 def WB : AMulxyI<0b0001001, 0b01, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3767 def WT : AMulxyI<0b0001001, 0b11, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3777 def BB : AMulxyIa<0b0001000, 0b00, (outs GPRnopc:$Rd),
3785 def BT : AMulxyIa<0b0001000, 0b10, (outs GPRnopc:$Rd),
3793 def TB : AMulxyIa<0b0001000, 0b01, (outs GPRnopc:$Rd),
3801 def TT : AMulxyIa<0b0001000, 0b11, (outs GPRnopc:$Rd),
3809 def WB : AMulxyIa<0b0001001, 0b00, (outs GPRnopc:$Rd),
3817 def WT : AMulxyIa<0b0001001, 0b10, (outs GPRnopc:$Rd),
3831 def SMLALBB : AMulxyI64<0b0001010, 0b00, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
3836 def SMLALBT : AMulxyI64<0b0001010, 0b10, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
3841 def SMLALTB : AMulxyI64<0b0001010, 0b01, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
3846 def SMLALTT : AMulxyI64<0b0001010, 0b11, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
3893 def D : AMulDualIa<0, sub, 0, (outs GPRnopc:$Rd),
3897 def DX: AMulDualIa<0, sub, 1, (outs GPRnopc:$Rd),
3901 def LD: AMulDualI64<1, sub, 0, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
3905 def LDX : AMulDualI64<1, sub, 1, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
3916 def D:AMulDualI<0, sub, 0, (outs GPRnopc:$Rd), (ins GPRnopc:$Rn, GPRnopc:$Rm),
3918 def DX:AMulDualI<0, sub, 1, (outs GPRnopc:$Rd),(ins GPRnopc:$Rn, GPRnopc:$Rm),
3928 def SDIV : ADivA1I<0b001, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), IIC_iDIV,
3933 def UDIV : ADivA1I<0b011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), IIC_iDIV,
3942 def CLZ : AMiscA1I<0b000010110, 0b0001, (outs GPR:$Rd), (ins GPR:$Rm),
3947 def RBIT : AMiscA1I<0b01101111, 0b0011, (outs GPR:$Rd), (ins GPR:$Rm),
3953 def REV : AMiscA1I<0b01101011, 0b0011, (outs GPR:$Rd), (ins GPR:$Rm),
3959 def REV16 : AMiscA1I<0b01101011, 0b1011, (outs GPR:$Rd), (ins GPR:$Rm),
3966 def REVSH : AMiscA1I<0b01101111, 0b1011, (outs GPR:$Rd), (ins GPR:$Rm),
3976 def PKHBT : APKHI<0b01101000, 0, (outs GPRnopc:$Rd),
3993 def PKHTB : APKHI<0b01101000, 1, (outs GPRnopc:$Rd),
4036 def CMNri : AI1<0b1011, (outs), (ins GPR:$Rn, so_imm:$imm), DPFrm, IIC_iCMPi,
4052 def CMNzrr : AI1<0b1011, (outs), (ins GPR:$Rn, GPR:$Rm), DPFrm, IIC_iCMPr,
4069 def CMNzrsi : AI1<0b1011, (outs),
4088 def CMNzrsr : AI1<0b1011, (outs),
4128 def BCCi64 : PseudoInst<(outs),
4134 def BCCZi64 : PseudoInst<(outs),
4147 def MOVCCr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$false, GPR:$Rm, pred:$p),
4152 def MOVCCsi : ARMPseudoInst<(outs GPR:$Rd),
4158 def MOVCCsr : ARMPseudoInst<(outs GPR:$Rd),
4167 def MOVCCi16 : ARMPseudoInst<(outs GPR:$Rd),
4175 def MOVCCi : ARMPseudoInst<(outs GPR:$Rd),
4183 def MOVCCi32imm : ARMPseudoInst<(outs GPR:$Rd),
4188 def MVNCCi : ARMPseudoInst<(outs GPR:$Rd),
4223 def DMB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
4232 def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
4241 def ISB : AInoP<(outs), (ins instsyncb_opt:$opt), MiscFrm, NoItinerary,
4252 def ABS : ARMPseudoInst<(outs GPR:$dst), (ins GPR:$src), 8, NoItinerary, []>;
4257 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4260 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4263 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4266 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4269 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4272 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4275 (outs
4278 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4281 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4284 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4287 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4290 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4293 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4296 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4299 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4302 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4305 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4308 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4311 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4314 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4317 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4320 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4323 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4326 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4329 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4332 (outs GPR:$dst), (ins GPR:$ptr, GPR:$incr), NoItinerary,
4335 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4338 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4341 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4344 (outs GPR:$dst), (ins GPR:$ptr, GPR:$val), NoItinerary,
4348 (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary,
4351 (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary,
4354 (outs GPR:$dst), (ins GPR:$ptr, GPR:$new), NoItinerary,
4358 (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary,
4361 (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary,
4364 (outs GPR:$dst), (ins GPR:$ptr, GPR:$old, GPR:$new), NoItinerary,
4371 (outs), (ins GPR:$dst, GPR:$src, i32imm:$size, i32imm:$alignment),
4404 def LDREXB : AIldrex<0b10, (outs GPR:$Rt), (ins addr_offset_none:$addr),
4408 def LDREXH : AIldrex<0b11, (outs GPR:$Rt), (ins addr_offset_none:$addr),
4411 def LDREX : AIldrex<0b00, (outs GPR:$Rt), (ins addr_offset_none:$addr),
4415 def LDREXD: AIldrex<0b01, (outs GPRPairOp:$Rt),(ins addr_offset_none:$addr),
4422 def STREXB: AIstrex<0b10, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
4425 def STREXH: AIstrex<0b11, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
4428 def STREX : AIstrex<0b00, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
4432 def STREXD : AIstrex<0b01, (outs GPR:$Rd),
4440 def CLREX : AXI<(outs), (ins), MiscFrm, NoItinerary, "clrex",
4457 def SWP : AIswp<0, (outs GPRnopc:$Rt),
4459 def SWPB: AIswp<1, (outs GPRnopc:$Rt),
4467 def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4488 def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4524 def _OFFSET : ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4540 def _PRE : ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
4556 def _POST: ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4574 def _OPTION : ACI<(outs),
4595 def _OFFSET : ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4611 def _PRE : ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
4627 def _POST: ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4645 def _OPTION : ACInoP<(outs),
4702 (outs),
4711 (outs GPRwithAPSR:$Rt),
4745 (outs),
4754 (outs GPRwithAPSR:$Rt),
4766 : ABI<0b1100, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4791 : ABXI<0b1100, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4823 def MRS : ABI<0b0001, (outs GPRnopc:$Rd), (ins), NoItinerary,
4840 def MRSsys : ABI<0b0001, (outs GPRnopc:$Rd), (ins), NoItinerary,
4858 def MSR : ABI<0b0001, (outs), (ins msr_mask:$mask, GPR:$Rn), NoItinerary,
4872 def MSRi : ABI<0b0011, (outs), (ins msr_mask:$mask, so_imm:$a), NoItinerary,
4894 def TPsoft : PseudoInst<(outs), (ins), IIC_Br,
4918 def Int_eh_sjlj_setjmp : PseudoInst<(outs), (ins GPR:$src, GPR:$val),
4927 def Int_eh_sjlj_setjmp_nofp : PseudoInst<(outs), (ins GPR:$src, GPR:$val),
4936 def Int_eh_sjlj_longjmp : PseudoInst<(outs), (ins GPR:$src, GPR:$scratch),
4947 def Int_eh_sjlj_dispatchsetup : PseudoInst<(outs), (ins), NoItinerary, []>;
4956 def MOVPCRX : ARMPseudoExpand<(outs), (ins GPR:$dst),
4968 def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2,
4977 def MOV_ga_pcrel : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
4982 def MOV_ga_dyn : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
4988 def MOV_ga_pcrel_ldr : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
