Lines Matching full:outs
93 op, (outs SReg_32:$dst), (ins SSrc_32:$src0),
98 op, (outs SReg_64:$dst), (ins SSrc_64:$src0),
103 op, (outs SReg_32:$dst), (ins SSrc_32:$src0, SSrc_32:$src1),
108 op, (outs SReg_64:$dst), (ins SSrc_64:$src0, SSrc_64:$src1),
113 op, (outs SCCReg:$dst), (ins SSrc_32:$src0, SSrc_32:$src1),
118 op, (outs SCCReg:$dst), (ins SSrc_64:$src0, SSrc_64:$src1),
123 op, (outs SReg_32:$dst), (ins i16imm:$src0),
128 op, (outs SReg_64:$dst), (ins i16imm:$src0),
135 op, 1, (outs dstClass:$dst),
141 op, 0, (outs dstClass:$dst),
164 op, (outs drc:$dst), (ins src:$src0),
170 (outs drc:$dst),
190 op, (outs vrc:$dst), (ins arc:$src0, vrc:$src1),
196 (outs vrc:$dst),
218 op, (outs VReg_32:$dst), (ins VSrc_32:$src0, VReg_32:$src1),
224 (outs VReg_32:$dst),
248 (outs SReg_64:$dst),
270 op, (outs VReg_32:$dst),
277 op, (outs VReg_64:$dst),
290 op, (outs VReg_64:$dst),
302 (outs regClass:$vdst),
313 (outs),
325 (outs),
342 def _OFFEN : MUBUF <op, (outs regClass:$vdata),
348 def _IDXEN : MUBUF <op, (outs regClass:$vdata),
354 def _ADDR64 : MUBUF <op, (outs regClass:$vdata),
363 MUBUF <op, (outs), (ins vdataClass:$vdata, SReg_128:$srsrc, VReg_64:$vaddr, i16imm:$offset),
383 (outs regClass:$dst),
396 (outs VReg_128:$vdata),
411 (outs VReg_128:$vdata),
