Lines Matching full:outs
192 (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
196 (outs IntRegs:$dst), (ins IntRegs:$b, i32imm:$c),
205 (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
208 (outs IntRegs:$dst), (ins IntRegs:$b, i32imm:$c),
217 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
218 : InstSP<outs, ins, asmstr, pattern>;
222 def GETPCX : Pseudo<(outs getPCX:$getpcseq), (ins), "$getpcseq", [] >;
226 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt),
229 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
236 def FLUSHW : F3_1<0b10, 0b101011, (outs), (ins),
240 def TA3 : F3_2<0b10, 0b111010, (outs), (ins),
245 def UNIMP : F2_1<0b000, (outs), (ins i32imm:$val),
254 : Pseudo<(outs IntRegs:$dst), (ins IntRegs:$T, IntRegs:$F, i32imm:$Cond),
258 : Pseudo<(outs FPRegs:$dst), (ins FPRegs:$T, FPRegs:$F, i32imm:$Cond),
263 : Pseudo<(outs DFPRegs:$dst), (ins DFPRegs:$T, DFPRegs:$F, i32imm:$Cond),
271 : Pseudo<(outs IntRegs:$dst), (ins IntRegs:$T, IntRegs:$F, i32imm:$Cond),
276 : Pseudo<(outs FPRegs:$dst), (ins FPRegs:$T, FPRegs:$F, i32imm:$Cond),
280 : Pseudo<(outs DFPRegs:$dst), (ins DFPRegs:$T, DFPRegs:$F, i32imm:$Cond),
290 def RETL: F3_2<2, 0b111000, (outs), (ins i32imm:$val),
294 def RET: F3_2<2, 0b111000, (outs), (ins i32imm:$val),
300 (outs IntRegs:$dst), (ins MEMrr:$addr),
304 (outs IntRegs:$dst), (ins MEMri:$addr),
308 (outs IntRegs:$dst), (ins MEMrr:$addr),
312 (outs IntRegs:$dst), (ins MEMri:$addr),
316 (outs IntRegs:$dst), (ins MEMrr:$addr),
320 (outs IntRegs:$dst), (ins MEMri:$addr),
324 (outs IntRegs:$dst), (ins MEMrr:$addr),
328 (outs IntRegs:$dst), (ins MEMri:$addr),
332 (outs IntRegs:$dst), (ins MEMrr:$addr),
336 (outs IntRegs:$dst), (ins MEMri:$addr),
342 (outs FPRegs:$dst), (ins MEMrr:$addr),
346 (outs FPRegs:$dst), (ins MEMri:$addr),
350 (outs DFPRegs:$dst), (ins MEMrr:$addr),
354 (outs DFPRegs:$dst), (ins MEMri:$addr),
360 (outs), (ins MEMrr:$addr, IntRegs:$src),
364 (outs), (ins MEMri:$addr, IntRegs:$src),
368 (outs), (ins MEMrr:$addr, IntRegs:$src),
372 (outs), (ins MEMri:$addr, IntRegs:$src),
376 (outs), (ins MEMrr:$addr, IntRegs:$src),
380 (outs), (ins MEMri:$addr, IntRegs:$src),
386 (outs), (ins MEMrr:$addr, FPRegs:$src),
390 (outs), (ins MEMri:$addr, FPRegs:$src),
394 (outs), (ins MEMrr:$addr, DFPRegs:$src),
398 (outs), (ins MEMri:$addr, DFPRegs:$src),
404 (outs IntRegs:$dst), (ins i32imm:$src),
411 def NOP : F2_1<0b100, (outs), (ins), "nop", []>;
417 (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
421 (outs IntRegs:$dst), (ins IntRegs:$b, i32imm:$c),
427 (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
431 (outs IntRegs:$dst), (ins IntRegs:$b, i32imm:$c),
436 (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
440 (outs IntRegs:$dst), (ins IntRegs:$b, i32imm:$c),
453 (outs IntRegs:$dst), (ins MEMri:$addr),
472 (outs), (ins IntRegs:$b, IntRegs:$c),
476 (outs), (ins IntRegs:$b, i32imm:$c),
483 (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
507 : F2_2<cc, 0b010, (outs), ins, asmstr, pattern> {
523 (outs), (ins MEMrr:$ptr),
527 (outs), (ins MEMri:$ptr),
543 : F2_2<cc, 0b110, (outs), ins, asmstr, pattern> {
563 def CALL : InstSP<(outs), (ins calltarget:$dst, variable_ops),
572 (outs), (ins MEMrr:$ptr, variable_ops),
576 (outs), (ins MEMri:$ptr, variable_ops),
584 (outs IntRegs:$dst), (ins),
590 (outs), (ins IntRegs:$b, IntRegs:$c),
593 (outs), (ins IntRegs:$b, i32imm:$c),
598 (outs FPRegs:$dst), (ins FPRegs:$src),
602 (outs DFPRegs:$dst), (ins FPRegs:$src),
608 (outs FPRegs:$dst), (ins FPRegs:$src),
612 (outs FPRegs:$dst), (ins DFPRegs:$src),
618 (outs DFPRegs:$dst), (ins FPRegs:$src),
622 (outs FPRegs:$dst), (ins DFPRegs:$src),
628 (outs FPRegs:$dst), (ins FPRegs:$src),
631 (outs FPRegs:$dst), (ins FPRegs:$src),
635 (outs FPRegs:$dst), (ins FPRegs:$src),
642 (outs FPRegs:$dst), (ins FPRegs:$src),
646 (outs DFPRegs:$dst), (ins DFPRegs:$src),
654 (outs FPRegs:$dst), (ins FPRegs:$src1, FPRegs:$src2),
658 (outs DFPRegs:$dst), (ins DFPRegs:$src1, DFPRegs:$src2),
662 (outs FPRegs:$dst), (ins FPRegs:$src1, FPRegs:$src2),
666 (outs DFPRegs:$dst), (ins DFPRegs:$src1, DFPRegs:$src2),
672 (outs FPRegs:$dst), (ins FPRegs:$src1, FPRegs:$src2),
676 (outs DFPRegs:$dst), (ins DFPRegs:$src1, DFPRegs:$src2),
680 (outs DFPRegs:$dst), (ins FPRegs:$src1, FPRegs:$src2),
685 (outs FPRegs:$dst), (ins FPRegs:$src1, FPRegs:$src2),
689 (outs DFPRegs:$dst), (ins DFPRegs:$src1, DFPRegs:$src2),
700 (outs), (ins FPRegs:$src1, FPRegs:$src2),
704 (outs), (ins DFPRegs:$src1, DFPRegs:$src2),
719 : Pseudo<(outs IntRegs:$rd), (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cc),
723 : Pseudo<(outs IntRegs:$rd), (ins i32imm:$i, IntRegs:$f, CCOp:$cc),
730 : Pseudo<(outs IntRegs:$rd), (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cc),
734 : Pseudo<(outs IntRegs:$rd), (ins i32imm:$i, IntRegs:$f, CCOp:$cc),
741 : Pseudo<(outs FPRegs:$rd), (ins FPRegs:$rs2, FPRegs:$f, CCOp:$cc),
745 : Pseudo<(outs DFPRegs:$rd), (ins DFPRegs:$rs2, DFPRegs:$f, CCOp:$cc),
752 : Pseudo<(outs FPRegs:$rd), (ins FPRegs:$rs2, FPRegs:$f, CCOp:$cc),
756 : Pseudo<(outs DFPRegs:$rd), (ins DFPRegs:$rs2, DFPRegs:$f, CCOp:$cc),
766 (outs DFPRegs:$dst), (ins DFPRegs:$src),
769 (outs DFPRegs:$dst), (ins DFPRegs:$src),
773 (outs DFPRegs:$dst), (ins DFPRegs:$src),
781 (outs IntRegs:$dst), (ins IntRegs:$src),
