Lines Matching full:outs
14 class InstSystemZ<int size, dag outs, dag ins, string asmstr,
18 dag OutOperandList = outs;
158 class InstRI<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
159 : InstSystemZ<4, outs, ins, asmstr, pattern> {
172 class InstRIEb<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
173 : InstSystemZ<6, outs, ins, asmstr, pattern> {
191 class InstRIEc<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
192 : InstSystemZ<6, outs, ins, asmstr, pattern> {
209 class InstRIEd<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
210 : InstSystemZ<6, outs, ins, asmstr, pattern> {
226 class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
227 : InstSystemZ<6, outs, ins, asmstr, pattern> {
246 class InstRIL<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
247 : InstSystemZ<6, outs, ins, asmstr, pattern> {
260 class InstRR<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
261 : InstSystemZ<2, outs, ins, asmstr, pattern> {
273 class InstRRD<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
274 : InstSystemZ<4, outs, ins, asmstr, pattern> {
289 class InstRRE<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
290 : InstSystemZ<4, outs, ins, asmstr, pattern> {
303 class InstRRF<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
304 : InstSystemZ<4, outs, ins, asmstr, pattern> {
319 class InstRX<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
320 : InstSystemZ<4, outs, ins, asmstr, pattern> {
334 class InstRXE<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
335 : InstSystemZ<6, outs, ins, asmstr, pattern> {
351 class InstRXF<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
352 : InstSystemZ<6, outs, ins, asmstr, pattern> {
370 class InstRXY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
371 : InstSystemZ<6, outs, ins, asmstr, pattern> {
387 class InstRS<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
388 : InstSystemZ<4, outs, ins, asmstr, pattern> {
402 class InstRSY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
403 : InstSystemZ<6, outs, ins, asmstr, pattern> {
420 class InstSI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
421 : InstSystemZ<4, outs, ins, asmstr, pattern> {
433 class InstSIL<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
434 : InstSystemZ<6, outs, ins, asmstr, pattern> {
446 class InstSIY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
447 : InstSystemZ<6, outs, ins, asmstr, pattern> {
462 class InstSS<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
463 : InstSystemZ<6, outs, ins, asmstr, pattern> {
554 : InstRRE<opcode, (outs cls:$R1), (ins),
561 : InstRI<opcode, (outs cls:$R1), (ins cls:$R1src, brtarget16:$I2),
570 : InstRSY<opcode, (outs cls:$R1, cls:$R3), (ins bdaddr20only:$BD2),
577 : InstRIL<opcode, (outs), (ins cls:$R1, pcrel32:$I2),
590 : InstRX<opcode, (outs), (ins cls:$R1, mode:$XBD2),
602 : InstRXY<opcode, (outs), (ins cls:$R1, mode:$XBD2),
624 : InstRSY<opcode, (outs), (ins cls:$R1, cls:$R3, bdaddr20only:$BD2),
631 : InstSI<opcode, (outs), (ins mode:$BD1, imm:$I2),
639 : InstSIY<opcode, (outs), (ins mode:$BD1, imm:$I2),
647 : InstSIL<opcode, (outs), (ins bdaddr12only:$BD1, imm:$I2),
666 : InstRSY<opcode, (outs), (ins cls:$R1, mode:$BD2, cond4:$valid, cond4:$R3),
679 : InstRSY<opcode, (outs), (ins cls:$R1, mode:$BD2, uimm8zx4:$R3),
690 : InstRSY<opcode, (outs), (ins cls:$R1, mode:$BD2),
700 : InstRR<opcode, (outs cls1:$R1), (ins cls2:$R2),
709 : InstRRE<opcode, (outs cls1:$R1), (ins cls2:$R2),
718 : InstRRF<opcode, (outs cls1:$R1), (ins uimm8zx4:$R3, cls2:$R2),
728 : InstRRF<opcode, (outs cls1:$R1), (ins cls2:$R2, cond4:$valid, cond4:$R3),
738 : InstRRF<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2, uimm8zx4:$R3),
748 : InstRRF<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
758 : InstRI<opcode, (outs cls:$R1), (ins imm:$I2),
764 : InstRIL<opcode, (outs cls:$R1), (ins imm:$I2),
770 : InstRIL<opcode, (outs cls:$R1), (ins pcrel32:$I2),
783 : InstRSY<opcode, (outs cls:$R1),
802 : InstRSY<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$BD2, uimm8zx4:$R3),
815 : InstRSY<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$BD2),
828 : InstRX<opcode, (outs cls:$R1), (ins mode:$XBD2),
839 : InstRXE<opcode, (outs cls:$R1), (ins bdxaddr12only:$XBD2),
851 : InstRXY<opcode, (outs cls:$R1), (ins mode:$XBD2),
874 : InstRR<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
885 : InstRRE<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
896 : InstRRF<opcode, (outs cls1:$R1), (ins cls1:$R3, cls2:$R2),
905 : InstRRF<opcode, (outs cls1:$R1), (ins cls1:$R2, cls2:$R3),
935 : InstRI<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
944 : InstRIEd<opcode, (outs cls:$R1), (ins cls:$R3, imm:$I2),
962 : InstRIL<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
972 : InstRX<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$XBD2),
985 : InstRXE<opcode, (outs cls:$R1), (ins cls:$R1src, bdxaddr12only:$XBD2),
1000 : InstRXY<opcode, (outs cls:$R1), (ins cls:$R1src, mode:$XBD2),
1026 : InstSI<opcode, (outs), (ins mode:$BD1, imm:$I2),
1035 : InstSIY<opcode, (outs), (ins mode:$BD1, imm:$I2),
1055 : InstRS<opcode, (outs cls:$R1), (ins cls:$R1src, shift12only:$BD2),
1065 : InstRSY<opcode, (outs cls:$R1), (ins cls:$R3, shift20only:$BD2),
1082 : InstRR<opcode, (outs), (ins cls1:$R1, cls2:$R2),
1092 : InstRRE<opcode, (outs), (ins cls1:$R1, cls2:$R2),
1102 : InstRI<opcode, (outs), (ins cls:$R1, imm:$I2),
1110 : InstRIL<opcode, (outs), (ins cls:$R1, imm:$I2),
1118 : InstRIL<opcode, (outs), (ins cls:$R1, pcrel32:$I2),
1132 : InstRX<opcode, (outs), (ins cls:$R1, mode:$XBD2),
1144 : InstRXE<opcode, (outs), (ins cls:$R1, bdxaddr12only:$XBD2),
1157 : InstRXY<opcode, (outs), (ins cls:$R1, mode:$XBD2),
1183 : InstSI<opcode, (outs), (ins mode:$BD1, imm:$I2),
1192 : InstSIL<opcode, (outs), (ins bdaddr12only:$BD1, imm:$I2),
1202 : InstSIY<opcode, (outs), (ins mode:$BD1, imm:$I2),
1223 : InstRRD<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, cls:$R2),
1234 : InstRXF<opcode, (outs cls:$R1),
1249 : InstRS<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, mode:$BD2),
1260 : InstRSY<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, mode:$BD2),
1281 : InstRIEf<opcode, (outs cls1:$R1),
1307 class Pseudo<dag outs, dag ins, list<dag> pattern>
1308 : InstSystemZ<0, outs, ins, "", pattern> {
1316 : Pseudo<(outs cls:$dst),
1332 def "" : Pseudo<(outs),
1337 def Inv : Pseudo<(outs),
1349 : Pseudo<(outs cls:$dst), (ins bdaddr20only:$ptr, operand:$src2),
1372 : Pseudo<(outs GR32:$dst),
