Lines Matching full:outs
14 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt),
16 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
27 def ADJDYNALLOC : Pseudo<(outs GR64:$dst), (ins dynalloc12only:$src),
39 def RET : InstRR<0x07, (outs), (ins), "br\t%r14", [(z_retflag)]>;
45 def BR : InstRR<0x07, (outs), (ins ADDR64:$R2),
49 def J : InstRI<0xA74, (outs), (ins brtarget16:$I2), "j\t$I2",
54 def JG : InstRIL<0xC04, (outs), (ins brtarget32:$I2), "jg\t$I2", []>;
63 def BRC : InstRI<0xA74, (outs), (ins cond4:$valid, cond4:$R1,
66 def BRCL : InstRIL<0xC04, (outs), (ins cond4:$valid, cond4:$R1,
69 def AsmBRC : InstRI<0xA74, (outs), (ins uimm8zx4:$R1, brtarget16:$I2),
71 def AsmBRCL : InstRIL<0xC04, (outs), (ins uimm8zx4:$R1, brtarget32:$I2),
85 def RJ : InstRIEb<0xEC76, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3,
88 def GRJ : InstRIEb<0xEC64, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3,
91 def IJ : InstRIEc<0xEC7E, (outs), (ins GR32:$R1, imm32sx8:$I2, ccmask:$M3,
94 def GIJ : InstRIEc<0xEC7C, (outs), (ins GR64:$R1, imm64sx8:$I2, ccmask:$M3,
107 def J : InstRI<0xA74, (outs), (ins brtarget16:$I2),
109 def JG : InstRIL<0xC04, (outs), (ins brtarget32:$I2),
143 def CR : InstRIEb<0xEC76, (outs), (ins GR32:$R1, GR32:$R2,
146 def CGR : InstRIEb<0xEC64, (outs), (ins GR64:$R1, GR64:$R2,
149 def CI : InstRIEc<0xEC7E, (outs), (ins GR32:$R1, imm32sx8:$I2,
152 def CGI : InstRIEc<0xEC7C, (outs), (ins GR64:$R1, imm64sx8:$I2,
207 def BRAS : InstRI<0xA75, (outs), (ins pcrel16call:$I2, variable_ops),
209 def BRASL : InstRIL<0xC05, (outs), (ins pcrel32call:$I2, variable_ops),
211 def BASR : InstRR<0x0D, (outs), (ins ADDR64:$R2, variable_ops),
217 def AsmBRAS : InstRI<0xA75, (outs), (ins GR64:$R1, brtarget16:$I2),
219 def AsmBRASL : InstRIL<0xC05, (outs), (ins GR64:$R1, brtarget32:$I2),
221 def AsmBASR : InstRR<0x0D, (outs), (ins GR64:$R1, ADDR64:$R2),
275 def L128 : Pseudo<(outs GR128:$dst), (ins bdxaddr20only128:$src),
308 def ST128 : Pseudo<(outs), (ins GR128:$src, bdxaddr20only128:$dst),
337 def MVC : InstSS<0xD2, (outs), (ins bdladdr12onlylen8:$BDL1,
342 def MVCWrapper : Pseudo<(outs), (ins bdaddr12only:$dest, bdaddr12only:$src,
512 def LA : InstRX<0x41, (outs GR64:$R1), (ins laaddr12pair:$XBD2),
516 def LAY : InstRXY<0xE371, (outs GR64:$R1), (ins laaddr20pair:$XBD2),
525 def LARL : InstRIL<0xC00, (outs GR64:$R1), (ins pcrel32:$I2),
1100 : Pseudo<(outs GR32:$dst), (ins bdaddr20only:$addr, GR32:$cmp, GR32:$swap,
1125 def EAR : InstRRE<0xB24F, (outs GR32:$R1), (ins access_reg:$R2),
1153 def AEXT128_64 : Pseudo<(outs GR128:$dst), (ins GR64:$src), []>;
1154 def ZEXT128_32 : Pseudo<(outs GR128:$dst), (ins GR32:$src), []>;
1155 def ZEXT128_64 : Pseudo<(outs GR128:$dst), (ins GR64:$src), []>;
