Lines Matching refs:OpC
87 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
182 unsigned Opc = 0;
188 Opc = X86::MOV8rm;
192 Opc = X86::MOV16rm;
196 Opc = X86::MOV32rm;
201 Opc = X86::MOV64rm;
206 Opc = Subtarget->hasAVX() ? X86::VMOVSSrm : X86::MOVSSrm;
209 Opc = X86::LD_Fp32m;
215 Opc = Subtarget->hasAVX() ? X86::VMOVSDrm : X86::MOVSDrm;
218 Opc = X86::LD_Fp64m;
229 DL, TII.get(Opc), ResultReg), AM);
241 unsigned Opc = 0;
253 case MVT::i8: Opc = X86::MOV8mr; break;
254 case MVT::i16: Opc = X86::MOV16mr; break;
255 case MVT::i32: Opc = X86::MOV32mr; break;
256 case MVT::i64: Opc = X86::MOV64mr; break; // Must be in x86-64 mode.
258 Opc = X86ScalarSSEf32 ?
262 Opc = X86ScalarSSEf64 ?
267 Opc = Subtarget->hasAVX() ? X86::VMOVAPSmr : X86::MOVAPSmr;
269 Opc = Subtarget->hasAVX() ? X86::VMOVUPSmr : X86::MOVUPSmr;
273 Opc = Subtarget->hasAVX() ? X86::VMOVAPDmr : X86::MOVAPDmr;
275 Opc = Subtarget->hasAVX() ? X86::VMOVUPDmr : X86::MOVUPDmr;
282 Opc = Subtarget->hasAVX() ? X86::VMOVDQAmr : X86::MOVDQAmr;
284 Opc = Subtarget->hasAVX() ? X86::VMOVDQUmr : X86::MOVDQUmr;
289 DL, TII.get(Opc)), AM).addReg(ValReg);
301 unsigned Opc = 0;
306 case MVT::i8: Opc = X86::MOV8mi; break;
307 case MVT::i16: Opc = X86::MOV16mi; break;
308 case MVT::i32: Opc = X86::MOV32mi; break;
312 Opc = X86::MOV64mi32;
316 if (Opc) {
318 DL, TII.get(Opc)), AM)
333 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g.
335 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT,
338 unsigned RR = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc,
550 unsigned Opc = 0;
561 Opc = X86::MOV64rm;
567 Opc = X86::MOV32rm;
573 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg);
1440 unsigned Opc = 0;
1443 Opc = X86::CMOVE16rr;
1446 Opc = X86::CMOVE32rr;
1449 Opc = X86::CMOVE64rr;
1465 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg)
1696 unsigned OpC = 0;
1698 OpC = X86::ADD32rr;
1700 OpC = X86::ADD64rr;
1707 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(OpC), ResultReg)
1710 unsigned Opc = X86::SETBr;
1712 Opc = X86::SETOr;
1713 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg+1);
2238 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64;
2242 TII.get(Opc)), FI)
2244 Opc = ResVT == MVT::f32 ? X86::MOVSSrm : X86::MOVSDrm;
2246 TII.get(Opc), ResultReg + i), FI);
2324 unsigned Opc = 0;
2329 Opc = X86::MOV8rm;
2333 Opc = X86::MOV16rm;
2337 Opc = X86::MOV32rm;
2342 Opc = X86::MOV64rm;
2347 Opc = Subtarget->hasAVX() ? X86::VMOVSSrm : X86::MOVSSrm;
2350 Opc = X86::LD_Fp32m;
2356 Opc = Subtarget->hasAVX() ? X86::VMOVSDrm : X86::MOVSDrm;
2359 Opc = X86::LD_Fp64m;
2378 Opc = TLI.getPointerTy() == MVT::i32 ? X86::LEA32r : X86::LEA64r;
2381 TII.get(Opc), ResultReg), AM);
2412 TII.get(Opc), ResultReg),
2432 unsigned Opc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r;
2436 TII.get(Opc), ResultReg), AM);
2446 unsigned Opc = 0;
2452 Opc = X86::FsFLD0SS;
2455 Opc = X86::LD_Fp032;
2461 Opc = X86::FsFLD0SD;
2464 Opc = X86::LD_Fp064;
2474 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg);
