Lines Matching defs:Reg
48 // we may not actually need both reg and (-1 * reg) in registers; the
142 void CountRegister(const SCEV *Reg, size_t LUIdx);
143 void DropRegister(const SCEV *Reg, size_t LUIdx);
146 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
148 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
163 RegUseTracker::CountRegister(const SCEV *Reg, size_t LUIdx) {
165 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
168 RegSequence.push_back(Reg);
174 RegUseTracker::DropRegister(const SCEV *Reg, size_t LUIdx) {
175 RegUsesTy::iterator It = RegUsesMap.find(Reg);
199 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
200 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
210 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
211 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
366 /// DeleteBaseReg - Delete the given base reg from the BaseRegs list.
406 OS << "reg(" << **I << ')';
417 OS << Scale << "*reg(";
838 void RateRegister(const SCEV *Reg,
842 void RatePrimaryRegister(const SCEV *Reg,
852 void Cost::RateRegister(const SCEV *Reg,
856 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
886 if (!isa<SCEVUnknown>(Reg) &&
887 !isa<SCEVConstant>(Reg) &&
888 !(isa<SCEVAddRecExpr>(Reg) &&
889 (isa<SCEVUnknown>(cast<SCEVAddRecExpr>(Reg)->getStart()) ||
890 isa<SCEVConstant>(cast<SCEVAddRecExpr>(Reg)->getStart()))))
893 NumIVMuls += isa<SCEVMulExpr>(Reg) &&
894 SE.hasComputableLoopEvolution(Reg, L);
900 void Cost::RatePrimaryRegister(const SCEV *Reg,
905 if (LoserRegs && LoserRegs->count(Reg)) {
909 if (Regs.insert(Reg)) {
910 RateRegister(Reg, Regs, L, SE, DT);
912 LoserRegs->insert(Reg);
1001 OS << NumRegs << " reg" << (NumRegs == 1 ? "" : "s");
1315 // Otherwise, just guess that reg+reg addressing is legal.
3463 // For each addrec base reg, apply the scale, if possible.
3555 const SCEV *Reg = *I;
3556 int64_t Imm = ExtractImmediate(Reg, SE);
3558 Map.insert(std::make_pair(Reg, ImmMapTy()));
3560 Sequence.push_back(Reg);
3562 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(*I);
3572 const SCEV *Reg = *I;
3573 const ImmMapTy &Imms = Map.find(Reg)->second;
3579 DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
3594 UsedByIndicesMap[Reg].count() == 1) {
3599 // Conservatively examine offsets between this orig reg a few selected
3644 // Don't create 50 + reg(-50).
3794 const SCEV *Reg = *J;
3795 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
3796 Key.push_back(Reg);
4053 const SCEV *Reg = *I;
4054 if (Taken.count(Reg))
4057 Best = Reg;
4059 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4061 Best = Reg;
4150 const SCEV *Reg = *J;
4151 if ((!F.ScaledReg || F.ScaledReg != Reg) &&
4152 std::find(F.BaseRegs.begin(), F.BaseRegs.end(), Reg) ==
4384 const SCEV *Reg = *I;
4385 assert(!Reg->isZero() && "Zero allocated in a base register!");
4389 Reg = TransformForPostIncUse(Denormalize, Reg,
4393 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, 0, IP)));
